UPD6461GS NEC [NEC], UPD6461GS Datasheet - Page 52

• Manufacturer Part Number: UPD6461GS
• Description: CMOS LSI CHIP FOR CAMCORDER ON-SCREEN CHARACTER DISPLAY 12 ROWS x 24 COLUMNS
• Manufacturer: NEC [NEC]

52
POWER-ON CLEAR SPECIFICATIONS
EXTERNAL CLOCK INPUT
PCL pin low level hold time
Time from external clock fall to synchro-
nizing signal rise
Time from synchronizing signal rise to
external clock fall
t
S
Timing for external clock input (valid when selected with mask option)
Note 10% of the external clock cycle
Remarks 1. Keep the external clock in phase with the rising edges of Hsync.
(rising slew rate)
Example: When the external clock frequency is 8 MHz
Hsync
External
clock
2. Design the input of Hsync so that noise of more than 100 ns is suppressed.
3. When using an external clock, leave the OSC
Parameter
Parameter
Clock cycle = 125 ns
The maximum slew rate is 10% of 125 ns, giving 12.5 ns.
V
PCL
DD
Symbol
Symbol
t
PCLL
t
t
C-H
H-C
0 V
0 V
t
S
0.8 V
50 %
DD
t
C-H
t
PCLL
OUT
Conditions
Conditions
50 %
pin open.
t
H-C
0.16 V
DD
V
V
DD
DD
t
10 %
S
Min.
Min.
10
30
30
90 %
Typ.
Typ.
PD6461, 6462
Max.
Max.
Note
Unit
Unit
ns
ns
ns
s