EVM6436 SEMTECH [Semtech Corporation], EVM6436 Datasheet - Page 23

• Manufacturer Part Number: EVM6436
• Description: Per-Pin Electronics Companion DAC
• Manufacturer: SEMTECH [Semtech Corporation]

Digital Inputs
All digital inputs are LV_TTL compatible inputs.
Digital Outputs
SDOUT and LDOUT are CMOS outputs that switch between
DGND and DVDD.
Power Supply Sequence
Power supplies must be controlled such that they maintain
correct polarity with respect to each other and ground at
all times during power-up and power-down. The following
sequence is recommended:
TEST AND MEASUREMENT PRODUCTS
Circuit Description (continued)
2006 Semtech Corp. / Rev. 3, 8/25/06
TEST_MODE
DAC_OUT
1. AVEE
2. AVCC
3. AVDD, VREF
4. DVDD
Decoder
Address
Figure 12. DAC Voltage Output via DAC_OUT
VOUT_CH0_1
VOUT_CH0_2
VOUT_CH0_3
DAC Value Readback via DAC_OUT
Voltage Outputs
Each voltage output of the Edge6435/6436 has high
impedance FET(s) connected from the outputs to a
common analog line, DAC_OUT, that provides readback
of each DAC’s value. The primary purpose of this feature
is to provide means for diagnostics of correct DAC
functionality in an application that can monitor DAC_OUT,
and is not intended for DAC calibration.
The feature utilizes the normal address decoding, as shown
in Tables 3 and 4, as well as a "high" level on the
TEST_MODE pin (see truth table below).
NOTE: A CLK input is not required to change the state of
the DAC_OUT pin when TEST_MODE is toggled.
To test an output, a DAC should be loaded as described
above. At this point, the DAC_OUT pin, which is an analog
output, will reflect the voltage at the addressed DAC's
output pin.
Note that DAC_OUT is switched off when the parallel load
is selected (address 64). This prevents a parallel
connection of all the DAC outputs when the scan feature
is used.
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