54ABT273E-QML NSC [National Semiconductor], 54ABT273E-QML Datasheet - Page 2

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54ABT273E-QML

Manufacturer Part Number
54ABT273E-QML
Description
Octal D-Type Flip-Flop
Manufacturer
NSC [National Semiconductor]
Datasheet
www.national.com
Connection Diagrams
Truth Table
Mode Select-Function Table
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Reset (Clear)
Load “1”
Load “0”
Operating Mode
Pin Assignment for DIP
and Flatpack
MR
H
H
L
Inputs
CP
N
N
X
DS100205-1
D
X
h
l
n
D
MR
CP
Q
Names
0
0
Pin
–D
–Q
Output
7
7
Q
H
L
L
n
Data Inputs
Master Reset
Clock Pulse Input
Data Outputs
(Active LOW)
(Active Rising Edge)
Description
2
H = HIGH Voltage Level steady state
h = HIGH Voltage Level one setup time prior to the LOW-to-HIGH clock tran-
sition
L = LOW Voltage Level steady state
I = LOW Voltage Level one setup time prior to the LOW-to-HIGH clock tran-
sition
X = Immaterial
N
= LOW-to-HIGH clock transition
Pin Assignment
for LCC
DS100205-2
DS100205-3

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