GS8644Z18 ETC [List of Unclassifed Manufacturers], GS8644Z18 Datasheet - Page 27

• Manufacturer Part Number: GS8644Z18
• Description: 72Mb Pipelined and Flow Through Synchronous NBT SRAM
• Manufacturer: ETC [List of Unclassifed Manufacturers]

TMS
TCK
TDI
·
Identification (ID) Register
The ID Register is a 32-bit register that is loaded with a device and vendor specific 32-bit code when the controller is put in
Capture-DR state with the IDCODE command loaded in the Instruction Register. The code is loaded from a 32-bit on-chip ROM.
It describes various attributes of the RAM as indicated below. The register is then placed between the TDI and TDO pins when the
controller is moved into Shift-DR state. Bit 0 in the register is the LSB and the first to reach TDO when shifting begins.
Rev: 1.03 11/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
·
·
·
·
·
Test Access Port (TAP) Controller
Bypass Register
Instruction Register
ID Code Register
2
31 30 29
0
Boundary Scan Register
·
1
0
Control Signals
·
·
· · ·
·
2
1
0
·
JTAG TAP Block Diagram (2-die module)
·
·
27/39
·
TDO
GS8644Z18(B/E)/GS8644Z36(B/E)/GS8644Z72(C)
TDI
·
·
·
·
Test Access Port (TAP) Controller
Bypass Register
Instruction Register
ID Code Register
31 30 29
2
0
Boundary Scan Register
·
1
0
Control Signals
·
·
· · ·
·
2
1
0
·
Product Preview
© 2003, GSI Technology
·
·
·
TDO