K9F1208U0M- SAMSUNG [Samsung semiconductor], K9F1208U0M- Datasheet - Page 6

• Manufacturer Part Number: K9F1208U0M-
• Description: 64M x 8 Bit NAND Flash Memory
• Manufacturer: SAMSUNG [Samsung semiconductor]

K9F1208U0M-YCB0, K9F1208U0M-YIB0
CLE
ALE
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
NOTE : Connect all V
64M x 8 Bit NAND Flash Memory
Features
R/B
Vcc
Vss
WE
WP
Pin Configuration
RE
CE
- Memory Cell Array : (64M + 2,048K)bit x 8bit
- Data Register : (512 + 16)bit x8bit multipled by four planes
- Page Program : (512 + 16)Byte
- Block Erase : (16K + 512)Byte
- Random Access : 12 s(Max.)
- Serial Page Access : 50ns(Min.)
- Program time : 200 s(Typ.)
- Block Erase Time : 2ms(Typ.)
- Program/Erase Lockout During Power Transitions
- Endurance : 100K Program/Erase Cycles
- Data Retention : 10 Years
- K9F1208U0M-YCB0, K9F1208U0M-YIB0 :
Voltage Supply : 2.7V~3.6V
Organization
Automatic Program and Erase
528-Byte Page Read Operation
Fast Write Cycle Time
Command/Address/Data Multiplexed I/O Port
Hardware Data Protection
Reliable CMOS Floating-Gate Technology
Command Register Operation
Intelligent Copy-Back Operation
Package :
Simultaneous Four Page/Block Program/Erase
48 - Pin TSOP I (12 x 20 / 0.5 mm pitch)
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
Do not leave V
CC
Standard Type
12mm x 20mm
48-pin TSOP1
CC
and V
or V
SS
SS
disconnected.
pins of each device to common power supply outputs.
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
N.C
N.C
N.C
N.C
I/O7
I/O6
I/O5
I/O4
N.C
N.C
N.C
Vcc
Vss
N.C
N.C
N.C
I/O3
I/O2
I/O1
I/O0
N.C
N.C
N.C
N.C
6
General Description
The K9F1208U0M is a 64M(67,108,864)x8bit NAND Flash
Memory with a spare 2,048K(2,097,152)x8bit. Its NAND cell
provides the most cost-effective solution for the solid state
mass storage market. A program operation can be performed in
typical 200 s on the 528-byte page and an erase operation can
be performed in typical 2ms on a 16K-byte block. Data in the
page can be read out at 50ns cycle time per byte. The I/O pins
serve as the ports for address and data input/output as well as
command inputs. The on-chip write controller automates all
program and erase functions including pulse repetition, where
required, and internal verification and margining of data. Even
the write-intensive systems can take advantage of the
K9F1208U0M’s extended reliability of 100K program/erase
cycles by providing ECC(Error Correcting Code) with real time
mapping-out algorithm. The K9F1208U0M-YCB0/YIB0 is an
optimum solution for large nonvolatile storage applications such
as solid state file storage and other portable applications requir-
ing non-volatility.
Pin Description
I/O
Pin Name
0
CLE
ALE
V
WE
WP
R/B
V
N.C
CE
RE
~ I/O
CC
SS
7
Data Input/Outputs
Command Latch Enable
Address Latch Enable
Chip Enable
Read Enable
Write Enable
Write Protect
Ready/Busy output
Power(+2.7V~3.6V)
Ground
No Connection
FLASH MEMORY
Pin Function