54F153DM NSC [National Semiconductor], 54F153DM Datasheet - Page 2
![no-image](/images/no-image-200.jpg)
54F153DM
Manufacturer Part Number
54F153DM
Description
Dual 4-Input Multiplexer
Manufacturer
NSC [National Semiconductor]
Datasheet
1.54F153DM.pdf
(10 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
54F153DMQB/C
Manufacturer:
MOT
Quantity:
18
Unit Loading Fan Out
Functional Description
The ’F153 is a dual 4-input multiplexer It can select two bits
of data from up to four sources under the control of the
common Select inputs (S
circuits have individual active LOW Enables (E
can be used to strobe the outputs independently When the
Enables (E
Z
of a 2-pole 4-position switch where the position of the
switch is determined by the logic levels supplied to the two
Select inputs The logic equations for the outputs are as
follows
Truth Table
H
L
X
Pin Names
I
I
S
E
E
Z
Z
b
0a
0b
e
e
e
a
b
0
a
b
) are forced LOW The ’F153 is the logic implementation
–I
–I
LOW
S
Immaterial
HIGH Voltage Level
H
H
H
H
S
X
L
L
L
L
0
3a
3b
1
Select
Inputs
a
E
Side A Data Inputs
Side B Data Inputs
Common Select Inputs
Side A Enable Input (Active LOW)
Side B Enable Input (Active LOW)
Side A Output
Side B Output
b
S
H
H
H
H
X
L
L
L
L
) are HIGH the corresponding outputs (Z
1
Description
0
E
H
L
L
L
L
L
L
L
L
S
1
) The two 4-input multiplexer
I
H
X
L
X
X
X
X
X
X
0
Inputs (a or b)
I
X
X
X
H
X
X
X
X
L
1
a
E
HIGH LOW
b
) which
50 33 3
50 33 3
1 0 1 0
1 0 1 0
1 0 1 0
1 0 1 0
1 0 1 0
U L
I
X
X
X
X
X
H
X
X
L
2
a
54F 74F
2
20 A
20 A
20 A
20 A
20 A
Output I
b
b
I
H
X
X
X
X
X
X
X
L
Input I
The ’F153 can be used to move data from a group of regis-
ters to a common output bus The particular register from
which the data came would be determined by the state of
the Select inputs A less obvious application is as a function
generator The ’F153 can generate two functions of three
variables This is useful for implementing highly irregular
random logic
3
1 mA 20 mA
1 mA 20 mA
Z
Z
a
b
b
b
b
b
b
e
e
IH
OH
0 6 mA
0 6 mA
0 6 mA
0 6 mA
0 6 mA
E
E
I
Output
a
b
IL
I
OL
I
I
(I
(I
2a
2b
H
H
H
H
Z
L
L
L
L
L
0a
0b
S
S
S
S
1
1
1
1
S
S
S
S
0
0
0
0
a
a
a
a
I
I
3a
3b
I
I
1a
1b
S
S
S
S
1
1
1
1
S
S
S
S
0
0
0
)
0
)
a
a