SSD1805TR1 ETC2 [List of Unclassifed Manufacturers], SSD1805TR1 Datasheet - Page 22

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SSD1805TR1

Manufacturer Part Number
SSD1805TR1
Description
132 x 68 STN LCD Segment / Common Monochrome Driver with Controller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
7.6
This module is an On-Chip low power temperature compensation oscillator circuitry. The oscillator generates
the clock for the DC-DC voltage converter. This clock is also used in the Display Timing Generator. Please
refer to the figure 6 for the typical frame frequency at different temperature.
7.7
This block is a series of latches carrying the display signal information. These latches hold the data, which will
be fed to the HV Buffer Cell and Level Selector to output the required voltage level. The numbers of latches of
different members are given by:
32 Mux mode: 132 + 33 = 165
54 Mux mode: 132 + 55 = 187
64 Mux mode: 132 + 65 = 197
68 Mux mode: 132 + 68 = 200
7.8
This block is embedded in the Segment/Common Driver Circuits. HV Buffer Cell works as a level shifter,
which translates the low voltage output signal to the required driving voltage. The output is shifted out with an
internal FRM clock, which comes from the Display Timing Generator. The voltage levels are given by the level
selector that is synchronized with the internal M signal.
7.9
This block is embedded in the Segment/Common Driver Circuits. Level Selector is a control of the display
synchronization. Display voltage levels can be separated into two sets and used with different cycles.
Synchronization is important since it selects the required LCD voltage level to the HV Buffer Cell, which in
turn outputs the COM or SEG LCD waveform.
Solomon Systech
Oscillator Circuit
Display Data Latch
HV Buffer Cell (Level Shifter)
Level Selector
Figure 6 - Oscillator typical frame frequency with variation in temperature
Jun 2004 P 22/52
Rev 1.1
SSD1805 Series

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