AT52BR3224A-70CI ATMEL [ATMEL Corporation], AT52BR3224A-70CI Datasheet - Page 26
![no-image](/images/no-image-200.jpg)
AT52BR3224A-70CI
Manufacturer Part Number
AT52BR3224A-70CI
Description
32-megabit Flash + 4-megabit/ 8-megabit SRAM Stack Memory
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT52BR3224A-70CI.pdf
(46 pages)
- Current page: 26 of 46
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Data Polling Characteristics
Notes:
Data Polling Waveforms
Toggle Bit Characteristics
Notes:
Toggle Bit Waveforms
Notes:
26
Symbol
t
t
t
t
Symbol
t
t
t
t
t
DH
OEH
OE
WR
DH
OEH
OE
OEHP
WR
1. These parameters are characterized and not 100% tested.
2. See t
1. These parameters are characterized and not 100% tested.
2. See t
1. Toggling either OE or CE or both OE and CE will operate toggle bit. The t
2. Beginning and ending state of I/O6 will vary.
3. Any address location may be used but the address should not vary.
AT52BR3224A(T)/3228A(T)
input(s).
Parameter
Data Hold Time
OE Hold Time
OE to Output Delay
Write Recovery Time
Parameter
Data Hold Time
OE Hold Time
OE to Output Delay
OE High Pulse
Write Recovery Time
OE
OE
spec in “AC Read Characteristics” on page 22.
spec in “AC Read Characteristics” on page 22.
WE
CE
I/O7
OE
A0-A20
(2)
(2)
tDH
(1)(2)(3)
(1)
(1)
tOEH
tOE
An
HIGH Z
An
An
Min
Min
10
10
10
10
50
0
0
An
OEHP
specification must be met by the toggling
An
Typ
Typ
tWR
Max
Max
3338B–STKD–6/03
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
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