HI-3282PJI HOLTIC [Holt Integrated Circuits], HI-3282PJI Datasheet - Page 3

• Manufacturer Part Number: HI-3282PJI
• Description: ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER
• Manufacturer: HOLTIC [Holt Integrated Circuits]

FUNCTIONAL DESCRIPTION
CONTROL WORD REGISTER
The HI-3282 contains 11 data flip flops whose D inputs are con-
nected to the data bus and clocks connected to
flip flop provides options to the user as follows:
BDO6
DATA
BDO5
BDO7
BDO8
BDO9
BD04
BD10
BD12
BD13
BD14
BUS
BD11
PIN
CLK SELECT
CLK SELECT
FUNCTION CONTROL
RECEIVER 1
RECEIVER 2
XMTR DATA
SELF TEST
DECODER
DECODER
RCVR DTA
INVERT
PARITY
PAREN
XMTR
-
-
-
-
0 = ENABLE
1 = ENABLE
1 = ENABLE
1 = ENABLE
0 = ÷10
1 = ÷80
0 = ÷10
1 = ÷80
-
-
-
-
Logic 0 enables normal odd parity
429DO
If enabled, an internal connection
and Logic 1 enables even parity
Enables parity bit insertion into
80 to obtain XMTR data clock
80 to obtain RCVR data clock
If enabled, ARINC bits 9 and,
CLK is divided either by 10 or
CLK is divided either by 10 or
is made passing 429DO and
If enabled, ARINC bits 9 and
output in transmitter 32nd bit
10 must match the next two
10 must match the next two
enabled, the ARINC bit 10
enabled, then ARINC bit 9
enabled, the ARINC bit 9
If Receiver 1 Decoder is
If Receiver 1 Decoder is
If Receiver 2 Decoder is
If Receiver 2 Decoder is
enabled, then ARINC bit 10
Transmitter data bit 32
must match this bit
must match this bit
must match this bit
must match this bit
to the receiver logic inputs
control word bits
control word bits
DESCRIPTION
CWSTR
HOLT INTEGRATED CIRCUITS
. Each
HI-3282
3
The following table shows the bit positions in exchanging data with
the receiver or the transmitter. ARINC bit 1 is the first bit
transmitted or received.
THE RECEIVERS
ARINC BUS INTERFACE
Figure 1 shows the input circuit for each receiver. The ARINC 429
specification requires the following detection levels:
The HI-8382 guarantees recognition of these levels with a common
mode Voltage with respect to GND less than ±5V for the worst case
condition (4.75V supply and 13V signal level).
The tolerances in the design guarantee detection of the above
levels, so the actual acceptance ranges are slightly larger. If the
ARINC signal is out of the actual acceptance ranges, including the
nulls, the chip rejects the data.
ARINC
ARINC
DATA
DATA
BUS
BUS
BIT
BIT
BD BD BD BD BD BD BD BD BD BD BD BD BD BD BD BD
BD BD BD BD BD BD BD BD BD BD BD BD BD BD BD BD
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
13 12 11 10
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14
STATE
ZERO
NULL
ONE
ARINC 429 DATA FORMAT
9
BYTE 1
BYTE 2
DIFFERENTIAL VOLTAGE
+6.5 Volts to +13 Volts
+2.5 Volts to -2.5 Volts
31 30 32
-6.5 Volts to -13 Volts
1
2
3
4
5
6
7
8