SST89C5433CNJ Silicon Storage Technology, Inc, SST89C5433CNJ Datasheet

SST89C5433CNJ

Manufacturer Part Number

SST89C5433CNJ

Description

PLCC44

Manufacturer

Silicon Storage Technology, Inc

Datasheets

1.SST89C5433CNJ.pdf (52 pages)

2.SST89C5433CNJ.pdf (50 pages)

Specifications of SST89C5433CNJ

Date_code

03+

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FEATURES:

• 8-bit 8051-Compatible Microcontroller (MCU)

• SST89C54/58 Operation

• 256 Bytes Internal RAM

• Dual Block SuperFlash EEPROM

PRODUCT DESCRIPTION

The SST89C54 and SST89C58 are members of the

FlashFlex51 family of 8-bit microcontroller products

designed and manufactured with SST’s patented and

proprietary SuperFlash CMOS semiconductor process

technology. The split-gate cell design and thick-oxide tun-

neling injector offer significant cost and reliability benefits

for our customers. The devices use the 8051 instruction

set and are pin-for-pin compatible with standard 8051

microcontroller devices.

The devices come with 20/36 KByte of on-chip flash

EEPROM program memory which is partitioned into 2

independent program memory blocks. The primary

Block 0 occupies 16/32 KByte of internal program mem-

ory space and the secondary Block 1 occupies 4 KByte

of internal program memory space.

The 4 KByte secondary block can be mapped to the

highest or lowest location of the 64 KByte address space;

it can also be hidden from the program counter and used

as an independent EEPROM-like data memory.

S71131-04-000

with Embedded SuperFlash Memory

– Fully Software Compatible

– Development Toolset Compatible

– Pin-For-Pin Package Compatible

– 0 to 33MHz at 5V

– SST89C58:

– SST89C54:

– Individual Block Security Lock with SoftLock

– Concurrent Operation during

– Memory Overlay for Interrupt Support

32 KByte primary block (128-Byte sector size) +

4 KByte secondary block (64-Byte sector size)

16 KByte primary block (128-Byte sector size) +

4 KByte secondary block (64-Byte sector size)

In-Application Programming (IAP)

during IAP

6/04

SST89C5xFlashFlex51 MCU

FlashFlex51 MCU

SST89C54 / SST89C58

The SST logo, SuperFlash, and FlashFlex are registered trademarks of Silicon Storage Technology, Inc.

• Support External Address Range up to 64

• Three High Current Drive Ports (16 mA each)

• Three 16-bit Timers/Counters

• Full-Duplex Serial Port (UART)

• Six Interrupt Sources at 2 Priority Levels

• Programmable Watchdog Timer (WDT)

• Four 8-bit I/O Ports (32 I/O Pins)

• TTL- and CMOS-Compatible Logic Levels

• Low Power Modes

• Low Voltage at 2.7V (0 to 12MHz)

• Temperature Ranges:

• PDIP-40, PLCC-44 and TQFP-44 Packages

In addition to 20/36 KByte of EEPROM program memory

on-chip, the devices can address up to 64 KByte of exter-

nal program memory. In addition to 256 x8 bits of on-chip

RAM, up to 64 KByte of external RAM can be addressed.

The flash memory blocks can be programmed via a stan-

dard 87C5x OTP EPROM programmer fitted with a spe-

cial adapter and the firmware for SST’s devices. During

power-on reset, the devices can be configured as either

a slave to an external host for source code storage or a

master to an external host for an in-application program-

ming (IAP) operation. The devices are designed to be

programmed in-system and in-application on the printed

circuit board for maximum flexibility. The devices are pre-

programmed with an example of the bootstrap loader in

the memory, demonstrating the initial user program code

loading or subsequent user code updating via the IAP

operation. The sample bootstrap loader is available for

the user’s reference and convenience only; SST does not

guarantee its functionality or usefulness. Chip-Erase or

Block-Erase operations will erase the pre-programmed

sample code.

KByte of Program and Data Memory

– Power-down Mode with External Interrupt Wake-up

– Standby (Stop Clock)

– Commercial (0°C to +70°C)

– Industrial (-40°C to +85°C)

These specifications are subject to change without notice.

Data Sheet

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