MX29LV800BTC70 Macronix International Co., MX29LV800BTC70 Datasheet

MX29LV800BTC70

Manufacturer Part Number

MX29LV800BTC70

Description

TSOP48

Manufacturer

Macronix International Co.

Datasheet

1.MX29LV800BTC-70.pdf (60 pages)

Specifications of MX29LV800BTC70

Date_code

05+

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FEATURES

• Extended single - supply voltage range 2.7V to 3.6V

• 1,048,576 x 8/524,288 x 16 switchable

• Single power supply operation

• Fast access time: 70/90ns

• Low power consumption

• Command register architecture

• Auto Erase (chip & sector) and Auto Program

• Erase suspend/Erase Resume

GENERAL DESCRIPTION

The MX29LV800T/B is a 8-mega bit Flash memory or-

ganized as 1M bytes of 8 bits or 512K words of 16 bits.

MXIC's Flash memories offer the most cost-effective

and reliable read/write non-volatile random access

memory. The MX29LV800T/B is packaged in 44-pin

SOP, 48-pin TSOP, and 48-ball CSP. It is designed to be

reprogrammed and erased in system or in standard

EPROM programmers.

The standard MX29LV800T/B offers access time as fast

as 70ns, allowing operation of high-speed microproces-

sors without wait states. To eliminate bus contention,

the MX29LV800T/B has separate chip enable (CE) and

output enable (OE) controls.

MXIC's Flash memories augment EPROM functionality

with in-circuit electrical erasure and programming. The

MX29LV800T/B uses a command register to manage

this functionality. The command register allows for 100%

P/N:PM0709

- 3.0V only operation for read, erase and program

operation

- 20mA maximum active current

- 0.2uA typical standby current

- Byte/word Programming (9us/11us typical)

- Sector Erase (Sector structure 16K-Bytex1,

8K-Bytex2, 32K-Bytex1, and 64K-Byte x15)

- Automatically erase any combination of sectors with

Erase Suspend capability.

- Automatically program and verify data at specified

address

- Suspends sector erase operation to read data from,

or program data to, any sector that is not being erased,

then resumes the erase.

8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE

• Status Reply

• Ready/Busy pin (RY/BY)

• Sector protection

• 100,000 minimum erase/program cycles

• Latch-up protected to 100mA from -1V to VCC+1V

• Boot Sector Architecture

• Low VCC write inhibit is equal to or less than 2.3V

• Package type:

• Compatibility with JEDEC standard

TTL level control inputs and fixed power supply levels

during erase and programming, while maintaining maxi-

mum EPROM compatibility.

MXIC Flash technology reliably stores memory contents

even after 100,000 erase and program cycles. The MXIC

cell is designed to optimize the erase and programming

mechanisms. In addition, the combination of advanced

tunnel oxide processing and low internal electric fields

for erase and program operations produces reliable cy-

cling. The MX29LV800T/B uses a 2.7V~3.6V VCC sup-

ply to perform the High Reliability Erase and auto Pro-

gram/Erase algorithms.

The highest degree of latch-up protection is achieved

with MXIC's proprietary non-epi process. Latch-up pro-

tection is proved for stresses up to 100 milliamps on

address and data pin from -1V to VCC + 1V.

- Data polling & Toggle bit for detection of program and

erase operation completion.

- Provides a hardware method of detecting program or

erase operation completion.

- Hardware method to disable any combination of

sectors from program or erase operations

- Tempoary sector unprotect allows code changes in

previously locked sectors.

- T = Top Boot Sector

- B = Bottom Boot Sector

- 44-pin SOP

- 48-pin TSOP

- 48-pin CSP

- Pinout and software compatible with single-power

supply Flash

MX29LV800T/B

3V ONLY FLASH MEMORY

PRELIMINARY

REV. 1.3, JAN. 24, 2002

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