MX26L6420MC90 Macronix International Co., MX26L6420MC90 Datasheet

MX26L6420MC90

Manufacturer Part Number

MX26L6420MC90

Description

SOP44

Manufacturer

Macronix International Co.

Datasheet

1.MX26L6420MC90.pdf (39 pages)

Specifications of MX26L6420MC90

Date_code

04+

Current page: 1 of 39
Download datasheet (2Mb)

FEATURES

•

GENERAL DESCRIPTION

The MX26L6420 is a 64M bit MTP EPROM

as 4M bytes of 16 bits. MXIC's MTP EPROM

most cost-effective and reliable read/write non-volatile

random access memory. The MX26L6420 is packaged in

44SOP, 48-pin TSOP, 48-ball CSP and 63-ball CSP. It is

designed to be reprogrammed and erased in system or in

standard EPROM programmers.

The standard MX26L6420 offers access time as fast as

90ns, allowing operation of high-speed microprocessors

without wait states. To eliminate bus contention, the

MX26L6420 has separate chip enable (CE) and output

enable OE controls. MXIC's MTP EPROM

EPROM functionality with in-circuit electrical erasure and

programming. The MX26L6420 uses a command register

to manage this functionality.

P/N:PM0823

High Performance

Low Power Consumption

Single Power Supply Operation

Compatible with JEDEC standard

Minimum 100 erase/program cycle

4,194,304 x 16 byte structure

Low Vcc write inhibit is equal to or less than 2.5V

- 2.7 to 3.6 volt for read, erase, and program

operations

- Fast access time: 90/120ns (typ.)

- Fast program time: 140s/chip (typ.)

- Fast erase time: 150s/chip (typ.)

- Low active read current: 17mA (typ.) at 5MHz

- Low standby current: 30uA (typ.)

organized

augment

offer the

MULTIPLE-TIME-PROGRAMMABLE EPROM

•

MXIC's MTP EPROM

memory contents even after 100 erase and program

cycles. The MXIC cell is designed to optimize the erase

and program mechanisms. In addition, the combination of

advanced tunnel oxide processing and low internal

electric fields for erase and programming operations

produces reliable cycling.

The MX26L6420 uses a 2.7V to 3.6V VCC supply to

perform the High Reliability Erase and auto Program/

Erase algorithms.

The highest degree of latch-up protection is achieved with

MXIC's proprietary non-epiprocess. Latch-up protection

is proved for stresses up to 100 milliamps on address and

data pin from -1V to VCC +1V.

12V ACC input pin provides accelerated program

10 years data retention

Package

Status Reply

Output voltages and input voltages on the device is

- Data polling & Toggle bits provide detection of

program and erase operation completion

capability

deterined by the voltage on the VI/O pin.

- VI/O voltage range:1.65V~3.6V

- 44-Pin SOP

- 48-Pin TSOP

- 48-Ball CSP

- 63-Ball CSP

ADVANCED INFORMATION

MX26L6420

64M-BIT [4M x 16] CMOS

technology reliably stores

REV. 0.5, JAN. 29, 2002

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