MX29F800TTC-90 Macronix International Co., MX29F800TTC-90 Datasheet
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MX29F800TTC-90
Manufacturer Part Number
MX29F800TTC-90
Description
Manufacturer
Macronix International Co.
Datasheets
1.MX29F800TTC-90.pdf
(42 pages)
2.MX29F800BMC-12.pdf
(42 pages)
3.MX29F800TTC-70.pdf
(42 pages)
Specifications of MX29F800TTC-90
Case
TSOP48
Date_code
2006+
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MX29F800TTC-90
Manufacturer:
MXIC
Quantity:
5 530
Part Number:
MX29F800TTC-90
Manufacturer:
MX
Quantity:
20 000
FEATURES
• 1,048,576 x 8/524,288 x 16 switchable
• Single power supply operation
• Fast access time: 70/90/120ns
• Low power consumption
• Command register architecture
• Auto Erase (chip & sector) and Auto Program
• Erase suspend/Erase Resume
• Status Reply
GENERAL DESCRIPTION
The MX29F800T/B is a 8-mega bit Flash memory or-
ganized as 1M bytes of 8 bits or 512K words of 16 bits.
MXIC's Flash memories offer the most cost-effective and
reliable read/write non-volatile random access memory.
The MX29F800T/B is packaged in 44-pin SOP, 48-pin
TSOP. It is designed to be reprogrammed and erased
in system or in standard EPROM programmers.
The standard MX29F800T/B offers access time as fast
as 70ns, allowing operation of high-speed microproces-
sors without wait states. To eliminate bus contention,
the MX29F800T/B has separate chip enable (CE) and
output enable (OE) controls.
MXIC's Flash memories augment EPROM functionality
with in-circuit electrical erasure and programming. The
MX29F800T/B uses a command register to manage this
functionality. The command register allows for 100%
P/N:PM0578
- 5.0V only operation for read, erase and program
operation
- 50mA maximum active current
- 0.2uA typical standby current
- Byte/word Programming (7us/12us typical)
- Sector Erase (Sector structure 16K-Bytex1,
8K-Bytex2, 32K-Bytex1, and 64K-Byte x15)
- Automatically erase any combination of sectors with
Erase Suspend capability.
- Automatically program and verify data at specified
address
- Suspends sector erase operation to read data from,
or program data to, another sector that is not being
erased, then resumes the erase.
- Data polling & Toggle bit for detection of program and
8M-BIT [1Mx8/512Kx16] CMOS FLASH MEMORY
1
• Ready/Busy pin (RY/BY)
• Sector protection
• 100,000 minimum erase/program cycles
• Latch-up protected to 100mA from -1V to VCC+1V
• Boot Code Sector Architecture
• Low VCC write inhibit is equal to or less than 3.2V
• Package type:
• Compatibility with JEDEC standard
TTL level control inputs and fixed power supply levels
during erase and programming, while maintaining maxi-
mum EPROM compatibility.
MXIC Flash technology reliably stores memory contents
even after 100,000 erase and program cycles. The MXIC
cell is designed to optimize the erase and programming
mechanisms. In addition, the combination of advanced
tunnel oxide processing and low internal electric fields
for erase and program operations produces reliable cy-
cling. The MX29F800T/B uses a 5.0V±10% VCC sup-
ply to perform the High Reliability Erase and auto Pro-
gram/Erase algorithms.
The highest degree of latch-up protection is achieved
with MXIC's proprietary non-epi process. Latch-up pro-
tection is proved for stresses up to 100 milliamps on
address and data pin from -1V to VCC + 1V.
erase operation completion.
- Provides a hardware method of detecting program
or erase operation completion.
- Sector protect/chip unprotect for 5V/12V system.
- Hardware method to disable any combination of
sectors from program or erase operations
- Tempory sector unprotect allows code changes in
previously locked sectors.
- T = Top Boot Sector
- B = Bottom Boot Sector
- 44-pin SOP
- 48-pin TSOP
- Pinout and software compatible with single-power
supply Flash
MX29F800T/B
PRELIMINARY
REV. 1.7, JUL. 24, 2001