74AHCT139D,112 NXP Semiconductors, 74AHCT139D,112 Datasheet

IC DUAL 2:4 DECODER/DEMUX 16SOIC

74AHCT139D,112

Manufacturer Part Number
74AHCT139D,112
Description
IC DUAL 2:4 DECODER/DEMUX 16SOIC
Manufacturer
NXP Semiconductors
Series
74AHCTr
Type
Decoder/Demultiplexerr
Datasheet

Specifications of 74AHCT139D,112

Circuit
1 x 2:4
Independent Circuits
2
Current - Output High, Low
8mA, 8mA
Voltage Supply Source
Single Supply
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74AHCT139D
74AHCT139D
935263567112
1. General description
2. Features
3. Ordering information
Table 1.
Type number
74AHC139
74AHC139D
74AHC139PW
Ordering information
Package
Temperature range Name
40 C to +125 C
40 C to +125 C
The 74AHC139; 74AHCT139 is a high-speed Si-gate CMOS device and is pin compatible
with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard
No. 7-A.
The 74AHC139; 74AHCT139 is a high-speed, dual 2-to-4 line decoder/demultiplexer. This
device has two independent decoders, each accepting two binary weighted inputs (nA0
and nA1) and providing four mutually exclusive active LOW outputs (nY0 to nY3). Each
decoder has an active LOW enable input (nE). When nE is HIGH, every output is forced
HIGH. The enable input can be used as the data input for a 1-to-4 demultiplexer
application.
The 74AHC139; 74AHCT139 is identical to the HEF4556 of the HE4000B family.
I
I
I
I
I
I
I
74AHC139; 74AHCT139
Dual 2-to-4 line decoder/demultiplexer
Rev. 02 — 9 May 2008
Balanced propagation delays
All inputs have Schmitt-trigger actions
Inputs accept voltages higher than V
Input levels:
ESD protection:
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
N
N
N
N
N
For 74AHC139: CMOS level
For 74AHCT139: TTL level
HBM EIA/JESD22-A114E exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
CDM EIA/JESD22-C101C exceeds 1000 V
SO16
TSSOP16
Description
plastic small outline package; 16 leads;
body width 3.9 mm
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
CC
Product data sheet
Version
SOT109-1
SOT403-1

Related parts for 74AHCT139D,112

74AHCT139D,112 Summary of contents

Page 1

Dual 2-to-4 line decoder/demultiplexer Rev. 02 — 9 May 2008 1. General description The 74AHC139; 74AHCT139 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL specified in compliance with JEDEC ...

Page 2

... NXP Semiconductors Table 1. Ordering information Type number Package Temperature range Name 74AHCT139 74AHCT139D +125 C 74AHCT139PW +125 C 4. Functional diagram 1 1E 1Y0 2 1A0 1Y1 3 1A1 1Y2 1Y3 2Y0 14 2A0 2Y1 13 2A1 2Y2 2Y3 2E 15 Fig 1. Logic symbol Fig 3. Functional diagram 74AHC_AHCT139_2 Product data sheet 74AHC139 ...

Page 3

... NXP Semiconductors 5. Pinning information 5.1 Pinning Fig 4. Pin configuration 5.2 Pin description Table 2. Pin description Symbol Pin 1E 1 1A0 2 1A1 3 1Y0 4 1Y1 5 1Y2 6 1Y3 7 GND 8 2Y3 9 2Y2 10 2Y1 11 2Y0 12 2A1 13 2A0 74AHC_AHCT139_2 Product data sheet 74AHC139; 74AHCT139 1A0 1A1 3 14 ...

Page 4

... NXP Semiconductors 6. Functional description [1] Table 3. Function table Control Input nE nA0 [ HIGH voltage level LOW voltage level don’t care. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter ...

Page 5

... NXP Semiconductors 8. Recommended operating conditions Table 5. Operating conditions Symbol Parameter 74AHC139 V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/ V input transition rise and fall rate 74AHCT139 V supply voltage CC V input voltage I V output voltage O T ambient temperature ...

Page 6

... NXP Semiconductors Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions I input leakage GND current 5 supply current 5 input capacitance C output O capacitance 74AHCT139 V HIGH-level input voltage V LOW-level input voltage V HIGH-level output voltage 8.0 mA ...

Page 7

... NXP Semiconductors 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions 74AHC139 t propagation nAn to nYn; see pd delay nYn; see power MHz dissipation capacitance 74AHCT139 4 5 propagation nAn to nYn; see ...

Page 8

... NXP Semiconductors 11. Waveforms Measurement points are given in V and V are typical voltage output levels that occur with the output load Fig 5. Address input to output propagation delays Measurement points are given in V and V are typical voltage output levels that occur with the output load. ...

Page 9

... NXP Semiconductors Test data is given in Table Definitions test circuit termination resistance should be equal to output impedance load capacitance including jig and probe capacitance. L Fig 7. Load circuitry for measuring switching times Table 9. Test data Type Input V I 74AHC139 V CC 74AHCT139 3.0 V 74AHC_AHCT139_2 Product data sheet ...

Page 10

... NXP Semiconductors 12. Package outline SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 11

... NXP Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 12

... Document ID Release date 74AHC_AHCT139_2 20080509 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Table 74AHC_AHCT139_1 19990901 74AHC_AHCT139_2 Product data sheet 74AHC139 ...

Page 13

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 14

... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 4 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 12 14 Revision history ...

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