74ACT253SC Fairchild Semiconductor, 74ACT253SC Datasheet - Page 2

• Manufacturer Part Number: 74ACT253SC
• Description: IC MULTIPLEXER DUAL 4INP 16-SOIC
• Manufacturer: Fairchild Semiconductor
• Series: 74ACTr
• Type: Multiplexerr

Specifications of 74ACT253SC

• Circuit: 2 x 4:1
• Independent Circuits: 1
• Current - Output High, Low: 24mA, 24mA
• Voltage Supply Source: Single Supply
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Logical Function: Mux
• Configuration: 2 x 4:1
• Number Of Inputs: 8
• Number Of Outputs: 2
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 16
• Package Type: SOIC N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

©1988 Fairchild Semiconductor Corporation
74AC253, 74ACT253 Rev. 1.5
Logic Diagram
Truth Table
Address Inputs S
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
S
Select Inputs
X
H
H
H
H
L
L
L
L
0
0
S
and S
H
H
H
H
X
L
L
L
L
1
IEEE/IEC
1
are common to both sections.
I
H
X
X
X
X
X
X
X
L
0
I
X
X
X
H
X
X
X
X
L
1
Data Inputs
2
I
X
X
X
X
X
H
X
X
L
2
Functional Description
The AC/ACT253 contains two identical 4-input multiplex-
ers with 3-STATE outputs. They select two bits from four
sources selected by common Select inputs (S
4-input multiplexers have individual Output Enable (OE
OE
high impedance (High Z) state. This device is the logic
implementation of a 2-pole, 4-position switch, where the
position of the switch is determined by the logic levels
supplied to the two select inputs. The logic equations for
the outputs are shown:
Z
Z
If the outputs of 3-STATE devices are tied together, all
but one device must be in the high impedance state to
avoid high currents that would exceed the maximum
ratings. Designers should ensure that Output Enable
signals to 3-STATE devices whose outputs are tied
together are designed so that there is no overlap.
a
b
= OE
= OE
b
) inputs which, when HIGH, force the outputs to a
a
b
• (I
• (I
I
X
X
X
X
X
X
X
H
L
I
I
3
2a
2b
0a
0b
• S
• S
• S
• S
1
1
1
1
• S
• S
• S
• S
Output Enable
0
0
0
0
+ I
+ I
+ I
+ I
3a
3b
1a
1b
OE
H
L
L
L
L
L
L
L
L
• S
• S
• S
• S
1
1
1
1
• S
• S
• S
• S
0
0
0
0
)
)
+
+
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Outputs
0
, S
Z
H
H
H
H
Z
L
L
L
L
1
). The
a
,