SC643EVB SEMTECH [Semtech Corporation], SC643EVB Datasheet - Page 18
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SC643EVB
Manufacturer Part Number
SC643EVB
Description
Manufacturer
SEMTECH [Semtech Corporation]
Datasheet
1.SC643EVB.pdf
(26 pages)
SemPulse
SemPulse Timing Diagrams
The SemPulse single wire interface is used to enable or disable the device and confi gure all registers (see Figure 5). The
timing parameters refer to the digital I/O electrical specifi cations.
Timing Example 1
In this example (see Figure 6), the slave chip receives a sequence of pulses to set the address and data, and the pulses
experience interrupts that cause the pulse width to be non-uniform. Note that as long as the maximum high and low
times are satisfi ed and the hold times are within specifi cation, the data transfer is completed regardless of the number
of interrupts that delay the transmission.
Timing Example 2
In this example (see Figure 7), the slave chip receives a sequence of pulses to set the address and data, but an interrupt
occurs during a pulse that causes it to exceed the minimum address hold time. The write is meant to be the value 03h
in register 05h, but instead it is interpreted as the value 02h written to register 02h. The extended pulse that is delayed
by the interrupt triggers a false address detection, causing the next pulse set to be interpreted as the data set. To avoid
any problems with timing, make sure that all pulse widths comply with their timing requirements as outlined in this
datasheet.
®
SPIF
Interface (continued)
SPIF
SPIF
Figure 7 — Faulty SemPulse Data Write Due to Extended Interrupt Duration
t = t
Figure 5 — Uniform Timing Diagram for SemPulse Communication
Figure 6 — SemPulse Data Write with Non-Uniform Pulse Widths
t = t
SU
SU
Up to 32 rising edges
(0 to 31 pulses)
Address is set to
t
HI
register 02h
Interrupt
duration
t > t
HImax
t < t
HImax
Address is set
Address is set to
register 02h
t = t
HOLDA
t = t
Data written is
HOLDA
000010
Up to 64 rising edges
t
(0 to 63 pulses)
HI
t = t
HOLDA
t < t
t
LO
LOmax
t = t
t
LO
03h (address and data are
Address is set to register
HOLDD
Data written is
now out of order)
Data is written
000011
t = t
t = t
HOLDD
HOLDD
SC643
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