MT89L86AN MITEL [Mitel Networks Corporation], MT89L86AN Datasheet
MT89L86AN
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MT89L86AN Summary of contents
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... ALE ** for 48-pin SSOP only CMOS ST-BUS Multiple Rate Digital Switch DS5195 MT89L86AP MT89L86AN Description The 3.3V Multiple Rate Digital Switch (MT89L86) is pin compatible with MITEL’s 5V MT8986 and retains all of its functionality. This 3.3v device is designed to provide simultaneous non-blocking connections for up to 256 64kb/s channels or blocking connections for up to 512 64kb/s channels ...
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MT89L86 STi3 7 8 STi4 9 STi5 10 STi6/A6 11 STi7/ CLK 15 STi8/A0 16 STi9/A1 STi10/ ...
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Advance Information Pin Description (continued) Pin # Name 44 48 PLCC SSOP 12 12,36 V +3.3 Volt Power Supply RESET Device Reset ( 5v-tolerant input). This pin is only available for the 48-pin SSOP package. In normal operation, ...
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MT89L86 Pin Description (continued) Pin # Name 44 48 PLCC SSOP 36 39 STo6/A6 ST-BUS Output 6/Address 6 input (Three-state output/input). The function of this pin is determined by the switching configuration enabled. If non-multiplexed CPU bus is used along ...
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Advance Information Device Overview With the integration of voice, video and data services in the same network, there has been an increasing demand for systems which ensure that data kb/s rates maintain sequence integrity while being ...
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MT89L86 be output. The Connect Memory Low data is transmitted on to the output every frame until it is changed by the CPU with a new data. The features of each output channel in the 3.3V MT89L86 are controlled by ...
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Advance Information required, the IMS register has to be initialized on system power-up. In case of Identical I/O rates (DMO bit LOW) at both inputs and outputs, the switching configuration is selected by the two SCB bits as shown in ...
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MT89L86 Interface Number of Serial Clock Interface required at Data Rate CLK Pin Streams (MHz) 2 Mb/s 4.096 2 Mb/s 4.096 2 Mb/s 4.096 Nibble 4.096 Switching (2 Mb/s) 4 Mb/s 4.096 4 Mb/s 4.096 8 Mb/s 8.192 Table 1 ...
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Advance Information When the input frame offset is enabled, an "internal delay" four clock periods is added to the actual data input sampling, providing the MT89L86 serial timing unit a new input frame reference. An internal virtual ...
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MT89L86 Data Rate 2.048 Mb/s 4.096 Mb/s 8.192 Mb/s Table 4 - Constant Throughput Delay values configurations with input and output channels that provides more than its corresponding minimum throughput delay, will have a throughput delay equal to the difference ...
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Advance Information six address input lines (A0-A5) and four control lines (CS , DS, R/W and DTA). See Figures for each CPU interface timing. The parallel microprocessor port provides the access to the IMS, Control registers, the ...
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MT89L86 (CML) are output on the ST-BUS output streams once every frame unless the ODE input pin is LOW bit is HIGH, then the MT89L86 behaves as if bits 2 (Message Channel) and 0 (Output Enable) of every ...
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Advance Information Control Register - Read/Write 7 SM Bit Name 7 SM Split Memory. When 1, all subsequent reads are from the Data Memory and writes are to the Connection Memory Low, except when the Control Register is accessed again. ...
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MT89L86 Identical # of Input x select subsections I/O Output Rate Streams 2 Mb/s 8x8 STA2, STA1, STA0 2 Mb/s 4x4 STA1, STA0 2 Mb/s 16x8 STA3, STA2, STA1, STA0 4 Mb/s 4x4 STA1, STA0 4 Mb/s 8x4 STA2, STA1, ...
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Advance Information Interface Mode Selection Register - Read/Write 7 DMO Bit Name 7 DMO Device Main Operation. This bit is used by the CPU to define one of the two main operations of the 3.3V MT89L86. If this bit is ...
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MT89L86 Data Rate Selected DMO Bit at IDR bits (Mb/s) 2.048 LOW Identical I/O Rates 4.096 8.192 HIGH Input/Output Rate selected in Different I/O IDR/ODR bits Rates Table 8 - Switching Configurations for Identical I/O Rates 16 SCB1 SCB0 0 ...
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Advance Information Connection Memory High - Read/Write 7 X Bit Name 6 V/C Variable/Constant Throughput Delay Mode. This bit is used to select between Variable (LOW) and Constant Delay (HIGH) modes in a per-channel basis. Tables 1 and 2 describe ...
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MT89L86 Connection Memory Low - Read/Write 7 SAB2 Bit Name 7-5 SAB2-0* Source Stream Address bits. These three bits are used together with SAB3 in CMH to select different source streams for the connection. Depending on the ...
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Advance Information Stream Pair Selection Register - Read/Write 7 X Bit Name 5-3 SPA2-0 Stream Pair A selection. These three bits define which pair of streams are going to be connected to the switch matrix, together with the permanently connected ...
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MT89L86 Applications Switch Matrix Architectures The MT89L86 is an ideal device for designs of medium size switch matrix. For applications where voice and grouped data channels are transported within the same frame, the voice samples have to be time interchanged ...
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Advance Information throughput delay is guaranteed. applications, the MT89L86 allows cost effective implementations of Non-Blocking matrices ranging up to 1024 channels. Figures 12 and 13 show the block diagram of implementations with Non-Blocking capacities of 512 and 1024-channel, respectively. Interfacing ...
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MT89L86 8 MT89L86 Address 8 Decode RES RST 8051 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 ALE RD WR Figure 14 - Interfacing the 3.3V MT89L86 to the 8051 Microcontroller DTA goes low. When writing to the MT89L86, one ...
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Advance Information Absolute Maximum Ratings* Parameter 1 Supply Voltage 2 Voltage on any I/O pin (except supply pins) 3 Current at Digital Outputs 4 Storage Temperature 5 Package Power Dissipation * Exceeding these values may cause permanent damage. Functional operation ...
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MT89L86 AC Electrical Characteristics Voltages are with respect to ground (VSS) unless otherwise stated. Characteristics 1 Frame Pulse width 2 Frame Pulse setup time 3 Frame Pulse hold time 4 STo delay Active to Active 5 STi setup time 6 ...
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Advance Information AC Electrical Characteristics Voltages are with respect to ground (VSS) unless otherwise stated. Characteristics 1 Clock Period 2 Pulse Width 3 Frame Width High 4 Frame Setup 5 Frame Hold 6 Data Delay/Clock Active to Active 7 Serial ...
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MT89L86 AC Electrical Characteristics Characteristics 1 O STo0/9 Delay - Active to High STo0/9 Delay - High Z to Active Output Driver Enable Delay CSTo Output Delay S † Timing is ...
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Advance Information AC Electrical Characteristics - Serial Streams at 4.096 and 8.192 Mb/s (refer to Figures 19-24) Characteristics 6 Frame Sync Width 4.096Mb/s 8.192Mb/s 7 Valid Data Delay from CK Input 4.096Mb/s 8.192Mb/s 8 Input Data Setup 9 Input Data ...
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MT89L86 CLK (4.096 or 8.192 MHz (positive Ch 127 STo Bit 7 Bit 5 STi CLK (4.096 MHz (negative Ch. 63 ...
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Advance Information CLK (4.096 MHz (positive Ch. 63 STo Bit Ch. 31 STi Bit 0 CLK (4.096 MHz (negative Ch. 31 STo Bit 0 Ch. 63 STi ...
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MT89L86 CLK (4.096 MHz (positive Ch. 63 STo Bit 0 Ch. 31 STi Bit 0 CLK (4.096 MHz (negative Ch. 63 STo Bit 0 Ch. 31 STi Bit ...
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Advance Information CLK (8.192 MHz Ch. 127 Ch. 0 STi Bit 0 Bit Ch. 31 STo Bit 0 Figure 23 - Rate Conversion Mode (DMO bit= Mb Mb/s ...
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MT89L86 AC Electrical Characteristics Voltages are with respect to ground (VSS) unless otherwise stated. Characteristics 1 ALE pulse width 2 Address setup from ALE falling 3 Address hold from ALE falling 4 RD active after ALE falling 5 Data setup ...
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Advance Information t ALW ALE t t ADS ADH AD0- ADDRESS AD7 t ALRD ALWR DTA Figure 25 - Intel/National Multiplexed Bus Timing DATA t SWD CSR CSW t DSW ...
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MT89L86 AC Electrical Characteristics Voltages are with respect to ground (VSS) unless otherwise stated. Characteristics 1 AS pulse width 2 Address setup from AS falling 3 Address hold from AS falling 4 Data setup from DTA Low on Read 5 ...
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Advance Information DS R/W t ASW AS t ADS AD7-0 ADDRESS WR AD7-0 ADDRESS RD CS DTA Figure 26 - Motorola Multiplexed Bus Timing t RWS t DSH ADH SWD DATA t CSS t DDR t AKD ...
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MT89L86 AC Electrical Characteristics Voltages are with respect to ground (VSS) unless otherwise stated. Characteristics 1 CS Setup from DS rising 2 R/W Setup from DS rising 3 Add setup from DS rising 4 CS hold after DS falling 5 ...
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Advance Information DS CS R/W A0-A6 D0-D7 READ D0-D7 WRITE DTA Figure 27- Motorola Non-Multiplexed Bus Timing t CSS t RWS t ADS VALID DATA t t DSW SWD VALID DATA t t DDR DHW t AKD MT89L86 V HM ...
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Small Shrink Outline Package (SSOP Suffix Pin Notes: 1) Not to scale 2) Dimensions in inches 3) (Dimensions in millimeters) 4) Ref. JEDEC Standard M0-150/M0118 for 48 Pin 5) A ...
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Package Outlines Dim D General- (lead coplanarity) A Notes Not ...
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North America Tel: +1 (770) 486 0194 Fax: +1 (770) 631 8213 Information relating to products and services furnished herein by Mitel Corporation or its subsidiaries (collectively “Mitel”) is believed to be reliable. However, Mitel assumes no liability for errors ...