MSM7620-001GS-K OKI [OKI electronic componets], MSM7620-001GS-K Datasheet
MSM7620-001GS-K
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MSM7620-001GS-K Summary of contents
Page 1
... Power supply voltage : 5.5 V) • Power consumption : 150 mW (typ.) When powered down (typ.) • Package options: 32-pin plastic SSOP (SSOP32-P-640-0.80-K) (Product name : MSM7620-001GS-K) 64-pin plastic QFP (QFP64-P-1414-0.80-BK) (Product name : MSM7620-011GS-BK) This version: Aug. 1998 MSM7620 Previous version: Nov. 1996 ...
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... Detector SOUT Linear/ P/S Non-linear *RST *PWDWN Clock Generator X1/CLKIN X2 SCKO SYNCO NLP HCL * * If the MSM7620-011 is used in the slave mode, only the diagonally hatched blocks and the pins marked with * are used. ATT Gain Power Adaptive Calculator FIR Filter (AFF) – + Center ...
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... ATT 14 INT 7 15 IRLD connect pin Note: Pin 26 of the MSM7520 is CKSEL, while that of the MSM7620 is in open state possible to replace the MSM7520 with the MSM7620. 32-Pin Plastic SSOP Symbol Pin Symbol SIN 17 * RIN 18 * SCK 19 * SYNC ...
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... SOUT 30 15 ROUT connect pin Note: Pins 43, 53, and 61 of the MSM7520 are CKSEL, V pins of the MSM7620 are in open state possible to replace the MSM7520 with the MSM7620 64-Pin Plastic SSOP Symbol Pin ...
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... This input signal is loaded in synchronization with the falling edge of the INT signal or the rising edge of the RST signal. I Selection of the Master Chip and slave chip when used in a cascade connection. "L": Single chip or master chip "H": Slave chip MSM7620 5/28 ...
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... Connect to the INT pin of the master chip and all the slave chips. • Slave Chip in a Cascade Connection Leave open. Refer to the control pin connection example. Transmit serial data. I Input the m-law PCM signal synchronized to SYNC and SCK. Data is read in at the fall of SCK. MSM7620 6/28 ...
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... During power-down, all input pins are disabled and output pins are in the following sates : High impedance : SOUT, ROUT, PD0 to 15 "L": SYNCO, SCKO "H": OF1, OF2 Holds the last state : WDT, IRLD Not affected: X2, MCKO Reset after power-down is released. MSM7620 7/28 ...
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... Single Chip or Master Chip in a Cascade Connection "H": Gain control ON "L": Gain control OFF "H" is recommended for echo cancellation. • Slave Chip in a Cascade Connection Fixed at "L" This pin is loaded in synchronization with the falling edge of the INT signal or the rising edge of RST. MSM7620 8/28 ...
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... Refer to the control pin connection example. O Parallel data output flag. • Single Chip Connect to SF1. • Master Chip in a Cascade Connection Connect to SF2 of the first stage slave chip. • Slave Chip in a Cascade Connection Leave open. Refer to the control pin connection example. MSM7620 9/28 ...
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... OZL Input other than the above I — DDO When extarnal input is used as basic clock I DDS When oscillation circuit is used as basic clock C — — LOAD MSM7620 Rating Unit –0 –0 0 –55 to +150 °C Min. Typ. Max. Unit 4 ...
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... (echo return loss) L RES = ATT, GC, NLP: OFF R = –10 dBm0 kHz band white noise) E.R. ATT, GC, NLP: OFF T DS MSM7620 Min. Typ. Max. Unit — 30 — dB — — — — 11/28 ...
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... CYC t — — — WSY t — — — — DIC t — WIR t — — XD MSM7620 (Ta = –40°C to +85°C) Typ. Min. Max. Unit 17.5 18.0 18.5 MHz ns 54.1 55.56 57 23.5 — — ns 23.5 — — — ns — 5 — — ...
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... DTH t — DSR t — DHR t — WPD t — — WFO OFz connected to SFx t WFI t — — FH MSM7620 (Ta = –40°C to +85°C) Min. Typ. Max. Unit 1 — — — — ns — — 100 — — ms — — 111 ns — ...
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... SYNCO t WSO Serial Input Timing SCK SYNC SIN MSB RIN 7 6 IRLD t t MCH MCL t DCM t DCO DCC t CYO fsck. t SCK t CYC t WSY MSM7620 DSC LSB MSB DIC DIC t WIR 14/28 ...
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... MCK in the t DPS fsck. t SCK t CYC t WSY *Reset timing can be asynchronous t DIT DRE Reset Initialization Note: INT is invalid in the diagonally shaded interval. Power Down interval. MSM7620 t DSC t XD High-Z LSB MSB 0 7 Processing Start t DPE Processing Start 15/28 ...
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... RST t DHR t DSR NLP, HCL, ATT, ADP, GC Parallel Output Timing PD15 High OF1 OF2 Parallel Input Timing SF1 SF2 PD15 CYC t DTH t WPD Output Data WFO t WFI Input Data MSM7620 *Refer to the Serial Input Timing High-Z 16/28 ...
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... Semiconductor HOW TO USE THE MSM7620 The MSM7620 cancels the echo which returns to SIN using the RIN signal. Connect the base signal to the R-side and the echo generated signal to the S-side. Connection Methods According to Echos Example 1: Canceling acoustic echo (to handle acoustic echo from line input) ...
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... CODEC ROUT m-law Acoustic echo SIN Microphone input MSM7620 MSM7620 RIN SOUT + AFF – – AFF SOUT RIN + + For acoustic echo For line echo MSM7620 CODEC Line input SIN + m-law H ROUT Line echo 18/28 ...
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... ADP ATT ATT GC GC PWDWN PWDWN RST RST INT IRLD SF1 * * OF1 SF2 * * OF2 +5 V Asterisk * mark indicates a pin only for the MSM7620-011. Four-stage Cascade Connection Master + (slave ¥ 3) Master chip MS PD15 NLP NLP HCL HCL PD 0 ADP ADP ATT ATT GC ...
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... Semiconductor Clock Circuit Example Internal clock generator circuit MSM7620 X1/CLKIN C1 GND External clock input circuit X1/CLKIN 18 MHz X2 XTAL : 18 MHz XTAL C2 GND MSM7602 X2 5pF GND MSM7620 20/28 ...
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... RIN input: 5 kHz band white noise Echo delay time T ERL = 6 dB ATT, GC, NLP = OFF 100 150 200 Echo delay time [ms] ERL = 6 dB ATT, GC, NLP = OFF The second through seventh chips are connected in a cascade. MSM7620 0 RIN input level [dBm] 0 dBm = 2.2 dBm0 = 7chip 21/28 ...
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... Semiconductor Measurement System Block Diagram White noise generator MSM7543 RIN input kHz A Level meter PCM RIN ROUT m-law MSM7620 CODEC PCM SOUT SIN MSM7620 MSM7543 T D PCM A Delay Echo delay time m-law CODEC PCM A ATT ERL (echo return loss) 22/28 ...
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MSM7543GS-VK For cancellation of acoustic echo Mike input SIN AIN+ PCMOUT SIN ROUT VFRO PCMIN ROUT Speaker output GSX BCLOCK SCK RSYNC SYNC 22 14 ...
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... Semiconductor Cascade Connection Example MSM7620-011GS-BK MSM7620-011GS-BK MSM7620 24/28 ...
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... If powering down immediately after power ON, be sure first input 10 or more clocks of the basic clock. 7. After powering ON, be sure to reset. 8. After the power down pin is changed to a "1" from a "0", be sure to reset this canceler is used to cancel acoustic echoes, an echo attenuation may be less than 30 dB. MSM7620 25/28 ...
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... ROUT. ERL = (ROUT level) – (SIN level of the ROUT signal which returns as an echo) [dB] If ERL is positive (ROUT > SIN), the system is an attenuator system. If ERL is negative (ROUT < SIN), the system is an amplifier system. MSM7620 26/28 ...
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... Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). MSM7620 (Unit : mm) Package material Epoxy resin ...
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... Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). MSM7620 (Unit : mm) Package material Epoxy resin ...