AK4691EG AKM [Asahi Kasei Microsystems], AK4691EG Datasheet - Page 70

• Manufacturer Part Number: AK4691EG
• Description: 4ch ADC + 2ch DAC with MIC/HP/SPK-AMP
• Manufacturer: AKM [Asahi Kasei Microsystems]

MS0672-E-00
Addr
Addr
08H
09H
SPKG1-0: Speaker-Amp Output Gain Select
HPG: Headphone-Amp Gain Select
MICL1: Select path from Lch Pre-Amp #1 to LOUT pin.
MICR1: Select path from Rch Pre-Amp #1 to LOUT pin
MICL2: Select path from Lch Pre-Amp #2 to LOUT pin
IVOLC: Input Digital Volume Control Mode Select
DVOLC: Output Digital Volume Control Mode Select
LOPS: Stereo Line Output Power-Save Mode
LVOL2-0: Stereo Line Output Gain Select
0: 0dB (default)
1: +3.6dB
0: OFF (default)
1: ON
When PMMICL1 = PMLO bits = “1”, MICL1 bit is enabled.
0: OFF (default)
1: ON
When PMMICR1 = PMLO bits = “1”, MICR1 bit is enabled.
0: OFF (default)
1: ON
When PMMICL2 = PMLO bits = “1”, MICL2 bit is enabled.
0: Independent
1: Dependent (default)
0: Independent
1: Dependent (default)
0: Normal Operation (default)
1: Power-Save Mode
Default: “000” (0dB)
Register Name
HP/SPK Gain
Register Name
Mode Control 4
When IVOLC bit = “1”, IVL7-0 bits control both Lch and Rch volume level, while register values of IVL7-0
bits are not written to IVR7-0 bits. When IVOLC bit = “0”, IVL7-0 bits control Lch level and IVR7-0 bits
control Rch level, respectively.
When DVOLC bit = “1”, DVL7-0 bits control both Lch and Rch volume level, while register values of
DVL7-0 bits are not written to DVR7-0 bits. When DVOLC bit = “0”, DVL7-0 bits control Lch level and
DVR7-0 bits control Rch level, respectively.
Default
Default
R/W
R/W
LVOL2
R/W
(Table
RD
D7
D7
0
0
0
(Table
48)
(Table
LVOL1
RD
D6
R/W
D6
0
0
0
44)
52)
- 70 -
MICL2
LVOL0
R/W
D5
R/W
0
D5
0
MICR1
R/W
LOPS
D4
R/W
0
D4
0
MICL1
R/W
D3
0
RD
D3
0
0
HPG
R/W
D2
RD
0
D2
0
0
DVOLC
SPKG1
R/W
R/W
D1
D1
0
1
[AK4691]
SPKG0
IVOLC
2007/11
R/W
R/W
D0
D0
0
1