AK4160 AKM [Asahi Kasei Microsystems], AK4160 Datasheet - Page 21
AK4160
Manufacturer Part Number
AK4160
Description
16-channel Capacitive Touch Sensor IC
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet
1.AK4160.pdf
(40 pages)
- Current page: 21 of 40
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MS1313-E-01
Address 0x03 (W/R) Default 0x00
D6-D3
D2-D0
Bits
D7
Description
IRQ Status
Reserved
IOVER
IRQ2-0
Name
Short Detection of the RREF pin
Reserved: Must write “0”
IRQ Status
· The Edge Action case
· The Level Action case
· The GPIO Function
IOVER
The IOVER bit is set to “1”, when the RREF pin is shorted to VSS in run mode.
The AK4160 is changed from run mode to shutdown mode for the over current
protection.
The IRQ bit setting to the edge action is fix to the active state. When the IOVER bit
is “1”, run mode is invalid. When the IOVER bit is written “1”, the IOVER bit or
IRQ2-0 bits are cleared.
D7
The IRQ bits are set to “1”, when an interrupt occurs. There are 2ways to clear
these bits. It is selected by CLRM bit in the IRQCn register.
The IRQ bits are set to the input level of IRQN2-0 terminals. Reading or writing
“1” to the IRQ bits is invalid.
The IRQ bits are set to the level of IRQN2-0 terminals. Reading or writing “1” to
the IRQ bits is invalid.
CLRM bit = “0”: When the lower byte of the IRQ Status register is read.
CLRM bit = “1”: When the related bit (IRQ2-0 bits) is written “1”, the bit is
Reserved
D6
Reserved
- 21 -
cleared
D5
Reserved
D4
Description
Reserved
D3
IRQ2
D2
IRQ1
D1
[AK4160]
IRQ0
2011/11
D0
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