IA2910A-CD40M INNOVASIC [InnovASIC, Inc], IA2910A-CD40M Datasheet - Page 7

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IA2910A-CD40M

Manufacturer Part Number
IA2910A-CD40M
Description
Microprogram Controller
Manufacturer
INNOVASIC [InnovASIC, Inc]
Datasheet
Instruction Set Description
Microprogram Controller
Table 2
I(3:0)
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
NOTE 1: If CCENn is LOW and CCn is HIGH, HOLD; ELSE LOAD.
X = Don’ t Care
.NE. = Not equal
IA2910A Instruction Set
The IA2910A provides sixteen instructions which select the address of the next microinstruction to
be executed. Four of the instructions are unconditional – their effect depends only on the
instruction. Ten of the instructions have an effect which is partially controlled by an external, data-
dependent condition. Three of the instructions have an effect which is partially controlled by the
contents of the internal register/counter. The instruction set is shown in Table 2. Examples of the
Instruction Execution are illustrated in Figure 2. In this discussion it is assumed that CIN is tied
HIGH.
In the ten conditional instructions, the result of the data-dependent test is applied to CCn. If the
CCn input is LOW, the test is considered to have been passed, and the action specified in the name
occurs; otherwise, the test has failed and an alternate (often simply the execution of the next
sequential microinstruction) occurs. Testing of CCn may be disabled for a specific microinstruction
by setting CCENn HIGH, which unconditionally forces the action specified in the name; that is, it
forces a pass. Other ways of using CCENn include (1) tying it HIGH, which is useful if no
microinstruction is data-dependent; (2) tying it LOW if data-dependent instructions are never
IA2910A
Mnemonic
JZ
CJS
JMAP
CJP
PUSH
JSRP
CJV
JRP
RFCT
RPCT
CRTN
CJPP
LDCT
LOOP
CONT
TWB
Name
Jump Zero
Cond JSB PL
Jump Map
Cond Jump PL
Push/cond LD
cntr
Cond JSB R/PL
Cond Jump
Vector
Cond Jump
R/PL
Repeat Loop,
Cntr .NE. 0
Repeat PL, cntr
.NE. 0
Cond RTN
Cond Jump PL
& POP
LD Cntr &
Continue
Test End Loop
Continue
Three-Way
Branch
Reg/cntr
contents
X
X
X
X
X
X
X
X
.NE. 0
= 0
.NE. 0
= 0
X
X
X
X
X
.NE. 0
= 0
Copyright
Customer Specific IC Solutions
Fail
Y
0
PC
D
PC
PC
R
PC
R
F
PC
D
PC
PC
PC
PC
F
PC
F
D
1999, InnovASIC Inc.
Fail
Stack
CLEAR
HOLD
HOLD
HOLD
PUSH
PUSH
HOLD
HOLD
HOLD
POP
HOLD
HOLD
HOLD
HOLD
HOLD
HOLD
HOLD
HOLD
POP
Pass
Y
0
D
D
D
PC
D
D
D
F
PC
D
PC
F
D
PC
PC
PC
PC
PC
Preliminary
Pass
Stack
CLEAR
PUSH
HOLD
HOLD
PUSH
PUSH
HOLD
HOLD
HOLD
POP
HOLD
HOLD
POP
POP
HOLD
POP
HOLD
POP
POP
Reg/cntr
HOLD
HOLD
HOLD
HOLD
NOTE 1
HOLD
HOLD
HOLD
DEC
HOLD
DEC
HOLD
HOLD
HOLD
LOAD
HOLD
HOLD
DEC
HOLD
Data Sheet
Page 7 of 19
Enable
PL
PL
MAP
PL
PL
PL
VECT
PL
PL
PL
PL
PL
PL
PL
PL
PL
PL
PL
PL

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