CXP84124 Sony Corporation, CXP84124 Datasheet - Page 13
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CXP84124
Manufacturer Part Number
CXP84124
Description
CMOS 8-bit Single Chip Microcomputer
Manufacturer
Sony Corporation
Datasheet
1.CXP84124.pdf
(19 pages)
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Manufacturer
Quantity
Price
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Part Number:
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Manufacturer:
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(2) Serial transfer (CH0)
Note 1)
Note 2) The load condition for the SCK0 output mode, SO0 output delay time is 50pF + 1TTL.
CS0
delay time
CS0
float delay time
CS0
delay time
CS0
float delay time
CS0 High level width
SCK0 cycle time
SCK0
High, Low level width
SI0 input setup time
(for SCK0 )
SI0 input hold time
(for SCK0 )
SCK0
delay time
t
clock control register (address: 00FE
t
sys indicates the three values below according to the upper two bits (CPU clock selection) of the
sys [ns] = 2000/fc (upper two bits = “00”), 4000/fc (upper two bits = “01”), 16000/fc (upper two bits = “11”)
SCK0
SCK0
SO0
SO0
TEX
EC0
EC1
SO0
Item
Symbol
t
t
t
t
t
t
t
t
t
t
t
DCSK
DCSKF
DCSO
DCSOF
WHCS
KCY
KH
KL
SIK
KSI
KSO
,
Fig. 3. Event count clock timing
SCK0
SCK0
SO0
SO0
CS0
SCK0
SCK0
SI0
SI0
SO0
Pin
t
t
EH
TH
H
).
(Ta = –20 to +75°C, V
Chip select transfer mode
(SCK0 = output mode)
Chip select transfer mode
(SCK0 = output mode)
Chip select transfer mode
Chip select transfer mode
Chip select transfer mode
Input mode
Output mode
Input mode
Output mode
SCK0 input mode
SCK0 output mode
SCK0 input mode
SCK0 output mode
SCK0 input mode
SCK0 output mode
– 13 –
t
t
EF
TF
Condition
t
t
EL
TL
DD
= 4.5 to 5.5V, Vss = 0V reference)
8000/fc – 50
2
t
t
t
sys + 200
t
sys + 100
sys + 200
16000/fc
sys + 200
Min.
100
200
100
t
t
ER
TR
0.2V
0.8V
DD
DD
t
t
t
t
t
sys + 200
sys + 200
sys + 200
sys + 200
sys + 200
Max.
100
CXP84120/84124
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns