HDSP-3400 Agilent(Hewlett-Packard), HDSP-3400 Datasheet - Page 30

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HDSP-3400

Manufacturer Part Number
HDSP-3400
Description
20 mm (0.8 inch) Seven Segment Displays
Manufacturer
Agilent(Hewlett-Packard)
Datasheet
3.8 DBS Receiver
The HDM8513A DVB Demodulator including a dual A/D converter and the MPEG-2 decoder provide
the core digital processing technology for a DBS receiver conforming with the DVB standard.
A tuner accepts an L-band RF input from the antenna/LNB assembly located outside the building.
A host processor controls the tuner to the nominal center frequency of the target signal. Baseband
I and Q outputs from the downconverter are applied to an A/D converter pair which is sampled at a
fixed rate, 60MHz as illustrated in this example. The tuner is required to filter the received
baseband signal to a bandwidth less than half the sampling rate, but is not required to perform
matched filtering.
Once the HDM8513A has locked to the target signal, the host processor may read the internal
registers to determine the steady state frequency error. This error would be used to make period
corrections to the programmed frequency of the tuner PLL.
The HDM8513A provides an output which can be used to control the analog AGC in the tuner. This
digital signal must be filtered and amplified before applying it to the AGC control element. When
the loop is closed, the signal applied to the A/D converters is optimally scaled.
30
3
BSFC77GV6
L-B and
Co arse Tuning Step Frequ ency Control
Tuner
AGC 1
AGC 2
4 80 MHz
IF
4 80 MHz
Loo p
Filter
converter
SL171 0
Do wn-
F
IGURE
Q
I
21: T
Fixed F requency P LL Control
YPICAL
Filter
L ow
Pa ss
HDM8513A
AGC
WB
S
ET
T
OP
B
OX
Da ta
8
Clock
D
Inte rfa c e
Conditional
Host Proce ssor
EMODULATOR
(M C68340)
Access
M C68306
8
Demultiplexer
MPEG-2
DRAM
Serial
Interfa ce
Video
Audio

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