CXA1166 Sony Corporation, CXA1166 Datasheet

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CXA1166

Manufacturer Part Number
CXA1166
Description
8-bit 250 MSPS Flash A/D Converter
Manufacturer
Sony Corporation
Datasheet
Pin Configuration (Top View)
Description
A/D converter IC capable of digitizing analog signals
at a maximum rate of 250 MSPS. The digital I/O
level of this A/D converter is compatible with the
ECL 100K/10KH/10K.
CXA1076AK/CXA1176K/CXA1176AK,
replace the conventional models easily. Compared
with the conventional models, the CXA1166K has a
greatly improved performance because of the new
circuit design and carefully considered layout.
Features
• Differential linearity error: ±0.5 LSB or less
• Integral linearity error: ±0.5 LSB or less
• Built-in integral linearity compensation circuit
• Ultrahigh-speed operation with maximum conver-
• Low input capacitance: 18pF
• Wide analog input bandwidth: 250MHz (full-scale
• Single power supply: –5.2V
• Low power consumption: 1.4W (Typ.)
• Low error rate
• Good temperature characteristics
• Capable of driving 50Ω loads
Pins without name are NC pins (not connected internally).
The CXA1166K is an 8-bit ultrahigh-speed flash
This IC is pin-compatible with the conventional
sion rate of 250 MSPS
input, standard)
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
8-bit 250 MSPS Flash A/D Converter
AGND
DV
AV
AV
AV
LINV
V
V
RTS
OR
OR
D0
D0
D1
D1
EE
RT
EE
EE
EE
61
62
63
64
65
66
67
68
1
2
3
4
5
6
7
8
9
and
can
– 1 –
Structure
Applications
• Digital oscilloscopes
• Other apparatus requiring ultrahigh-speed A/D
Bipolar silicon monolithic IC
conversion
CXA1166K
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
68 pin LCC (Ceramic)
AGND
AV
V
V
AV
AV
CLK
CLK
MINV
D7
D7
D6
D6
DV
RB
RBS
EE
EE
EE
EE
E90406-ST

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CXA1166 Summary of contents

Page 1

... ECL 100K/10KH/10K. This IC is pin-compatible with the conventional CXA1076AK/CXA1176K/CXA1176AK, replace the conventional models easily. Compared with the conventional models, the CXA1166K has a greatly improved performance because of the new circuit design and carefully considered layout. Features • Differential linearity error: ±0.5 LSB or less • ...

Page 2

... Min. Typ –5.5 –5 – DV –0. –0.05 0 –0.1 0 –2.2 –2 –20 – 2 – –7 to +0.5 V –2.7 to +0.5 V –2.7 to +0.5 V 2.5 V –4 to +0.5 V 2.7 V – – –65 to +150 °C Max. Unit –4.95 V 0.05 V 0.05 V 0.1 V –1 100 °C CXA1166K ...

Page 3

... LINV – 3 – CXA1166K (MSB ...

Page 4

... CLK input Complementary CLK input. ECL threshold potential (–1.3V) is maintained with left open. The complementary input is recommended for stable operation at high speed though the operation only with the CLK input is possible when the CLK input is left open. CXA1166K ...

Page 5

... Circuit Circuit 6Ω – 5 – CXA1166K Description MSB and complementary MSB output Output Complementary 1 6 output LSB and complementary LSB output Overrange output; Low level for overrange. Overrange complementary output ...

Page 6

... CXA1166K Unit bits LSB LSB pF kΩ µA Ω Ω Ω Ω Ω Ω µA µA pF MSPS MHz TPS 2 TPS % deg ...

Page 7

... 80% 80 20% Tr CXA1166K ...

Page 8

... Aperture jitter (Taj) is defined as follows: Taj = / – 8 – 0V –1V –2V 129 (LSB) 128 t t 127 126 125 Sampling timing fluctuation ( = aperture jitter) (unit: LSB) If 256 = / ( ) CXA1166K ...

Page 9

... Analog Input Bias Current Measurement Circuit A – 5.2V 8 ECL Latch CLK ECL + Latch DATA 16 1⁄16 8 ECL DUT Latch CXA1166K CLK CLK Decimator CXA1166K – 9 – A Comparator Pulse B A<B Counter (CX20202A – 10bit D⁄A Vector Scope – 1V – 2V CXA1166K ...

Page 10

... Notes on Operation • The CXA1166K is an ultra-high speed A/D converter featuring ECL level of input/output for the logic block. In order to derive the most from its high-speed performance, the characteristic impedance should be matched properly. • The outputs are designed to drive a load terminated to –2V at 50Ω. An excellent transmission characteristic can be yielded by designing the printed circuit board with a 50Ω ...

Page 11

... IC Application” in Sony’s Data book. • Sony’s SPECL series is used as the logic ICs in the Application Circuit to investigate the maximum performance of the CXA1166K. For normal applications, lower speed logic ICs can be used according to the applied frequency. ...

Page 12

... Input voltage [ 3.0 – 200 100 0 –2.0 0 – 0.5 – 12 – V pin input capacitance vs. IN Voltage characteristics –1.5 –1 –0 — Input voltage [ pin input current vs. IN Voltage characteristics – – – 1.5 1.0 0.5 V — Input voltage [V] IN CXA1166K 0 0 ...

Page 13

... Resistor string current vs. Temperature characteristics –12 –14 –16 –18 –20 –22 –24 – — Case temperature [°C] CLK open voltage vs. Temperature characteristics –1.25 –1.3 –1.35 –1.4 –1.45 – — Case temperature [°C] – 13 – 50 100 150 50 100 150 50 100 150 CXA1166K ...

Page 14

... Tc — Case temperature [°C] V vs. Temperature characteristics OL –1.7 –1.8 –1.9 –2.0 –2.1 – — Case temperature [°C] SNR vs. Input frequency response characteristics Input frequency [MHz] – 14 – 50 100 150 50 100 150 100 CXA1166K ...

Page 15

... Input frequency [MHz] Maximum conversion rate vs. Temperature characteristics 300 250 200 –8 Error rate = 10 Input frequency = CLK frequency/4 – 1kHz 16LSB or more error 150 25 25 – Ta — Ambient temperature [°C] – 15 – Clock frequency : 250MHz 10 100 TPS 75 125 CXA1166K 1000 ...

Page 16

... Error rate vs. Clock duty cycle 10 – – 8 Input frequency = 125MHz, full-scale Clock frequency = 250MHz 16LSB or more error 300 10 – 100 0 Tc — Case temperature [°C] – 16 – CXA1166K CLK duty cycle [%] 150 ...

Page 17

... MSPS ADC Evaluation Board The CXA1166K PCB is a tool for customers to evaluate the performance of the CXA1166K (8-bit, 250MHz, high-speed A/D converter). In addition to indispensable features such as the reference voltage generator, this tool equips the input voltage offset generator, clock decimator, output date latches, 10-bit high-speed DAC, and 20-pin cable connector for digital outputs ...

Page 18

... CXA1166K ...

Page 19

... A/D Full Scale (VR2) The volume to adjust A/D converter V 3) Linearity (VR3) The volume to adjust the VRM (linearity) voltage by shorting the J1 – – 2 Tdh 1.8ns (Typ) N – – 2 Tdh 1.8ns (Typ) voltage (–2V typ.). RB – 19 – – 1 CXA1166K N N ...

Page 20

... 1/128 H = ECL High level ; L = ECL Low level 7) SW4 The switch for LINV High/Low. 8) SW5 The switch for MINV High/Low. 9) SW6 (D/A INV) The switch for D/A converter output inversion. – 20 – CXA1166K ...

Page 21

... The input circuit example to improve the SNR is shown in Fig.4. See the measured data in Fig for the SNR and the input circuit characteristics. 14) The part number of the digital output connector mounted on the PCB is KEL 8830E-020-170S. A corresponding connector and cable assembly is JUNKOSHA KB0020MCG50B1. 1.2mm GND Fig. 3. – 21 – Monitoring point CXA1166K ...

Page 22

... From offset circuit 240 AMP. IN 3pF 68 AGND AGND Fig. 4. Example of SNR Improvement Circuit 5pF 560 CLC409 3 – 22 – CXA1166K V IN2 V IN2 120 V IN1 V IN1 V (– 2V) RB ...

Page 23

... AGND GND EE V GND V EE DGND DIN DOUT DINB DOUTB REF – 23 – CXA1166K NC LEN2 QI NC QIN QON S0 COUTN S2 COUT ...

Page 24

... Fig.8. 2nd, 3rd Harmonic distortion vs. Input frequency – 20 – 30 – 40 – 50 – 60 – 70 – 80 Fig.6. Gain vs. Input frequency Fig.5. CXA1166K PCB Schematic Diagram Fig.4. Example of SNR Improvement Circuit 10 Input frequency [MHz] Fig.7. SNR vs. Input frequency Fig.5. CXA1166K PCB Schematic Diagram Fig.4. Example of SNR Improvement Circuit 1 10 Input frequency [MHz] Fig ...

Page 25

... Parts Layout Component side Soldering side – 25 – CXA1166K ...

Page 26

... Printed Pattern Component side Soldering side – 26 – CXA1166K ...

Page 27

... GND layer (inner layer) V layer (inner layer) EE – 27 – CXA1166K ...

Page 28

... Package Outline Unit: mm SONY CODE EIAJ CODE JEDEC CODE 68PIN LCC (CERAMIC) 21.59 ± 0.2 1.27 ± 0.2 15.85 ± 0.2 1.27 0.915 ± 0.07 R0.2 PIN NO.1 INDEX 2.16 ± 0.25 PACKAGE STRUCTURE PACKAGE MATERIAL LCC-68C-01 LEAD TREATMENT QFN068-C-S950-A LEAD MATERIAL PACKAGE WEIGHT – 28 – CXA1166K CERAMIC GOLD PLATING 3.7g ...

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