IDT70V27 S15PF Integrated Device Technology, Inc., IDT70V27 S15PF Datasheet

IDT70V27 S15PF

Manufacturer Part Number

IDT70V27 S15PF

Description

Manufacturer

Integrated Device Technology, Inc.

Datasheet

1.IDT70V27_S15PF.pdf (21 pages)

Specifications of IDT70V27 S15PF

Case

QFP

Date_code

05+

Current page: 1 of 21
Download datasheet (185Kb)

Features:

◆

Functional Block Diagram

NOTES:

1) BUSY is an input as a Slave (M/S=V

2) BUSY and INT are non-tri-state totem-pole outputs (push-pull).

True Dual-Ported memory cells which allow simultaneous

access of the same memory location

High-speed access

– Commercial: 15/20/25/35/55ns (max.)

– Industrial: 20/35ns (max.)

Low-power operation

– IDT70V27S

– IDT70V27L

Separate upper-byte and lower-byte control for bus

matching capability

Dual chip enables allow for depth expansion without

external logic

Active: 500mW (typ.)

Standby: 3.3mW (typ.)

Active: 500mW (typ.)

Standby: 660 µ W (typ.)

I/O

BUSY

SEM

INT

8-15L

0-7L

14L

(2)

(1,2)

) and an output as a Master (M/S=V

Decoder

Address

14L

HIGH-SPEED 3.3V

32K x 16 DUAL-PORT

STATIC RAM

Control

I/O

ARBITRATION

SEMAPHORE

INTERRUPT

MEMORY

32Kx16

ARRAY

70V27

LOGIC

6.01

(2)

◆

IDT70V27 easily expands data bus width to 32 bits or more

using the Master/Slave select when cascading more than

one device

M/S = V

Busy and Interrupt Flags

On-chip port arbitration logic

Full on-chip hardware support of semaphore signaling

between ports

Fully asynchronous operation from either port

LVTTL-compatible, single 3.3V (±0.3V) power supply

Available in 100-pin Thin Quad Flatpack (TQFP), and 144-

pin Fine Pitch BGA (fpBGA)

for selected speeds

Green parts available, see ordering information

Industrial temperature range (-40°C to +85°C) is available

Control

I/O

for BUSY input on Slave

for BUSY output flag on Master,

Decoder

Address

14R

SEPTEMBER 2006

3603 drw 01

IDT70V27S/L

R/W

BUSY

SEM

INT

I/O

14R

8-15R

0-7R

(2)

(1,2)

DSC 3603/10

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