MC74HC573ADWG ON Semiconductor, MC74HC573ADWG Datasheet - Page 3

MC74HC573ADWG

Manufacturer Part Number

MC74HC573ADWG

Description

IC TRANSP LATCH OCT 3ST 20-SOIC

Manufacturer

ON Semiconductor

Series

74HCr

Type

D-Typer

Datasheets

1.MC74HC573ANG.pdf (8 pages)

2.MC74HC573ADWG.pdf (5 pages)

Specifications of MC74HC573ADWG

Logic Type

D-Type Transparent Latch

Circuit

8:8

Output Type

Tri-State

Voltage - Supply

2 V ~ 6 V

Independent Circuits

Delay Time - Propagation

26ns

Current - Output High, Low

7.8mA, 7.8mA

Operating Temperature

-55°C ~ 125°C

Mounting Type

Surface Mount

Package / Case

20-SOIC (7.5mm Width)

Circuit Type

Low-Power Schottky

Current, Supply

160 μA

Function Type

8-Channels

Logic Function

Latch

Number Of Circuits

Octal

Package Type

SOIC-20

Special Features

Non-Inverting, Tri-State

Temperature, Operating, Range

-55 to +125 °C

Voltage, Supply

2 to 6 V

Logic Family

Number Of Bits

Number Of Elements

Latch Mode

Transparent

Polarity

Non-Inverting

Technology

CMOS

Propagation Delay Time

240ns

Operating Supply Voltage (typ)

2.5/3.3/5V

High Level Output Current

-7.8mA

Low Level Output Current

7.8mA

Operating Supply Voltage (min)

Operating Supply Voltage (max)

Operating Temp Range

-55C to 125C

Operating Temperature Classification

Military

Mounting

Surface Mount

Pin Count

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Other names

MC74HC573ADWG
MC74HC573ADWGOS

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Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î

Î Î Î Î

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress

ratings only. Functional operation above the Recommended Operating Conditions is not implied.

Extended exposure to stresses above the Recommended Operating Conditions may affect device

reliability.

†Derating − Plastic DIP: – 10 mW/_C from 65_ to 125_C

For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).

NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).

MAXIMUM RATINGS

RECOMMENDED OPERATING CONDITIONS

DC ELECTRICAL CHARACTERISTICS

Symbol

, V

out

stg

, t

out

Î Î Î Î Î Î Î Î Î Î Î Î Î Î

Î Î Î Î Î Î Î Î Î Î

DC Supply Voltage (Referenced to GND)

DC Input Voltage (Referenced to GND)

DC Output Voltage (Referenced to GND)

DC Input Current, per Pin

DC Output Current, per Pin

DC Supply Current, V

Power Dissipation in Still Air,

Storage Temperature

Lead Temperature, 1 mm from Case for 10 Seconds

DC Supply Voltage (Referenced to GND)

DC Input Voltage, Output Voltage (Referenced to GND)

Operating Temperature, All Package Types

Input Rise and Fall Time

Minimum High−Level Input Voltage

Maximum Low−Level Input Voltage

Minimum High−Level Output

Voltage

Maximum Low−Level Output

Voltage

Maximum Input Leakage Current

Maximum Three−State Leakage

Current

Maximum Quiescent Supply

Current (per Package)

(Figure 1)

SOIC Package: – 7 mW/_C from 65_ to 125_C

TSSOP Package: −6.1 mW/°C from 65_ to 125_C

Parameter

(Plastic DIP, TSSOP or SOIC Package)

Parameter

and GND Pins

TSSOP Package†

(Voltages Referenced to GND)

Î Î Î Î Î Î Î Î Î

SOIC Package†

Output in High−Impedance State

out

Plastic DIP†

= V

| v 20 mA

I = 0 mA

= 0.1 V or V

= V

= 2.0 V

= 4.5 V

= 6.0 V

Test Conditions

http://onsemi.com

or V

or GND

Î Î Î Î Î

Î Î Î

– 0.5 to V

– 55

Min

2.0

– 0.1 V

– 0.5 to + 7.0

– 65 to + 150

out

| v 6.0 mA

| v 7.8 mA

| v 6.0 mA

| v 7.8 mA

Value

± 20

± 35

± 75

Î Î Î

750

500

450

260

| ≤ 2.4mA

+ 125

1000

Max

500

400

6.0

+ 0.5

Î Î Î

2.0

3.0

4.5

6.0

2.0

3.0

4.5

6.0

2.0

4.5

6.0

3.0

4.5

6.0

2.0

4.5

6.0

3.0

4.5

6.0

Unit

Î Î Î Î Î Î Î Î Î Î

Î Î Î Î

– 55 to

25_C

± 0.1

– 0.5

3.15

1.35

2.48

3.98

5.48

0.26

1.5

2.1

4.2

0.5

0.9

1.8

1.9

4.4

5.9

0.1

4.0

circuitry to guard against damage

due to high static voltages or electric

fields. However, precautions must

be taken to avoid applications of any

voltage higher than maximum rated

voltages to this high−impedance cir-

cuit. For proper operation, V

range GND v (V

tied to an appropriate logic voltage

level (e.g., either GND or V

Unused outputs must be left open.

out

This device contains protection

Unused inputs must always be

Guaranteed Limit

Î Î Î Î

should be constrained to the

v 85_C

– 5.0

± 1.0

3.15

1.35

2.34

3.84

5.34

0.33

1.5

2.1

4.2

0.5

0.9

1 8

1.9

4.4

5.9

0.1

Î Î Î Î

v 125_C

or V

± 1.0

3.15

1.35

– 10

160

1.5

2.1

4.2

0.5

0.9

1.8

1.9

4.4

5.9

2.2

3.7

5.2

0.1

0.4

out

) v V

Î Î Î Î

Î Î

Î Î Î Î

Î Î

Î Î Î Î

Î Î

Î Î Î Î

Î Î

Î Î Î Î

Î Î

and

Unit

MC74HC573ADWG ON Semiconductor, MC74HC573ADWG Datasheet - Page 3

MC74HC573ADWG

Specifications of MC74HC573ADWG

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