74LVQ373MTR STMicroelectronics, 74LVQ373MTR Datasheet

IC DTYPE LATCH 3-ST OCTAL 20SOP

74LVQ373MTR

Manufacturer Part Number
74LVQ373MTR
Description
IC DTYPE LATCH 3-ST OCTAL 20SOP
Manufacturer
STMicroelectronics
Series
74LVQr
Datasheet

Specifications of 74LVQ373MTR

Logic Type
D-Type Transparent Latch
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
2 V ~ 3.6 V
Independent Circuits
1
Delay Time - Propagation
5.8ns
Current - Output High, Low
24mA, 24mA
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-SOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
DESCRIPTION
The 74LVQ373 is a low voltage CMOS OCTAL
D-TYPE LATCH with 3 STATE OUTPUT NON
INVERTING fabricated with sub-micron silicon
gate and double-layer metal wiring C
technology. It is ideal for low power and low noise
3.3V applications.
These 8 bit D-Type latch are controlled by a latch
Figure 1: Pin Connection And IEC Logic Symbols
July 2004
HIGH SPEED:
t
COMPATIBLE WITH TTL OUTPUTS
LOW POWER DISSIPATION:
I
LOW NOISE:
V
75 TRANSMISSION LINE OUTPUT DRIVE
CAPABILITY
SYMMETRICAL OUTPUT IMPEDANCE:
|I
PCI BUS LEVELS GUARANTEED AT 24 mA
BALANCED PROPAGATION DELAYS:
t
OPERATING VOLTAGE RANGE:
V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 373
IMPROVED LATCH-UP IMMUNITY
PD
CC
PLH
OH
OLP
CC
= 5.8 ns (TYP.) at V
= 4 A (MAX.) at T
| = I
(OPR) = 2V to 3.6V (1.2V Data Retention)
= 0.4V (TYP.) at V
t
PHL
OL
= 12mA (MIN) at V
LOW VOLTAGE CMOS OCTAL D-TYPE LATCH
A
CC
=25°C
CC
= 3.3 V
WITH 3 STATE OUTPUTS NON INVERTING
= 3.3V
CC
= 3.0 V
2
MOS
Table 1: Order Codes
enable input (LE) and an output enable input (OE).
While the LE inputs is held at a high level, the Q
outputs will follow the data input precisely.
When the LE is taken low, the Q outputs will be
latched precisely at the logic level of D input data.
While the (OE) input is low, the 8 outputs will be in
a normal logic state (high or low logic level) and
while high level the outputs will be in a high
impedance state.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PACKAGE
TSSOP
SOP
SOP
74LVQ373
Rev. 5
74LVQ373MTR
74LVQ373TTR
TSSOP
T & R
1/13

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74LVQ373MTR Summary of contents

Page 1

... All inputs and outputs are equipped with 2 MOS protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. 74LVQ373 SOP TSSOP PACKAGE T & R SOP 74LVQ373MTR TSSOP 74LVQ373TTR Rev. 5 1/13 ...

Page 2

Figure 2: Input And Output Equivalent Circuit Table 3: Truth Table Don’t Care High Impedance * : Q outputs are latched at the time when the LE input is taken ...

Page 3

Table 4: Absolute Maximum Ratings Symbol V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Current ...

Page 4

Table 6: DC Specifications Symbol Parameter V V High Level Input IH Voltage 3.0 to 3.6 V Low Level Input IL Voltage V High Level Output OH Voltage 3.0 V Low Level Output OL Voltage 3.0 I Input Leakage ...

Page 5

Table 8: AC Electrical Characteristics (C Symbol Parameter V t Propagation Delay 2.7 PLH Time 3.3 PHL t Propagation Delay 2.7 PLH Time PHL 3.3 t Output Disable 2.7 PLZ Time t ...

Page 6

Figure 4: Test Circuit PLH PHL PZL PLZ PZH PHZ C = 50pF or equivalent (includes jig and probe capacitance 500 or equivalent L 1 ...

Page 7

Figure 6: Waveform - Output Enable And Disable Times (f=1MHz; 50% duty cycle) Figure 7: Waveform - Propagation Delay Time (f=1MHz; 50% duty cycle) 74LVQ373 7/13 ...

Page 8

DIM. MIN. A 2.35 A1 0.1 B 0.33 C 0.23 D 12. 10.00 h 0.25 L 0.4 k 0° ddd 8/13 SO-20 MECHANICAL DATA mm. TYP MAX. 2.65 0.30 0.51 0.32 13.00 7.6 1.27 10.65 ...

Page 9

TSSOP20 MECHANICAL DATA DIM. MIN 0.05 A2 0.8 b 0.19 c 0.09 D 6.4 E 6.2 E1 4.3 e 0.65 BSC K 0˚ PIN 1 IDENTIFICATION 1 mm. TYP MAX. MIN. 1.2 ...

Page 10

DIM. MIN 12 10.8 Bo 13.2 Ko 3.1 Po 3.9 P 11.9 10/13 Tape & Reel SO-20 MECHANICAL DATA mm. TYP MAX. 330 13.2 30.4 11 13.4 3.3 4.1 12.1 inch ...

Page 11

Tape & Reel TSSOP20 MECHANICAL DATA mm. DIM. MIN. TYP A C 12 6.8 Bo 6.9 Ko 1.7 Po 3.9 P 11.9 MAX. MIN. 330 13.2 0.504 0.795 2.362 22.4 7 0.268 7.1 0.272 ...

Page 12

Table 10: Revision History Date Revision 29-Jul-2004 5 12/13 Description of Changes Ordering Codes Revision - pag. 1. ...

Page 13

... No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics ...

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