MC74AC373DWR2G ON Semiconductor, MC74AC373DWR2G Datasheet - Page 2

• Manufacturer Part Number: MC74AC373DWR2G
• Description: IC LATCH OCT TRANSP 3ST 20-SOIC
• Manufacturer: ON Semiconductor
• Series: 74ACr

Specifications of MC74AC373DWR2G

• Logic Type: D-Type Transparent Latch
• Circuit: 8:8
• Output Type: Tri-State
• Voltage - Supply: 2 V ~ 6 V
• Independent Circuits: 1
• Delay Time - Propagation: 7ns
• Current - Output High, Low: 24mA, 24mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: MC74AC373DWR2GOS

TRUTH TABLE
H = HIGH Voltage Level
L = LOW Voltage Level
Z = High Impedance
X = Immaterial
O
0
= Previous O
OE
OE
LE
H
L
L
L
D
0
0
Inputs
before LOW-to-HIGH Transition of Clock
LE
X
H
H
L
D
G
O
NOTE:
D
1
D
X
H
X
L
n
D
G
This diagram is provided only for the understanding of logic operations and
should not be used to estimate propagation delays.
O
Outputs
D
O
O
2
H
Z
L
n
0
D
MC74AC373, MC74ACT373
G
O
Figure 3. Logic Diagram
http://onsemi.com
D
3
D
G
O
2
latches with 3−state standard outputs. When the Latch
Enable (LE) input is HIGH, data on the D
latches. In this condition the latches are transparent, i.e., a
latch output will change state each time its D input changes.
When LE is LOW, the latches store the information that was
present on the D inputs a setup time preceding the
HIGH−to−LOW transition of LE. The 3-state standard
outputs are controlled by the Output Enable (OE) input.
When OE is LOW, the standard outputs are in the 2−state
mode. When OE is HIGH, the standard outputs are in the
high impedance mode but this does not interfere with
entering new data into the latches.
D
4
The MC74AC373/74ACT373 contains eight D−type
D
G
O
FUNCTIONAL DESCRIPTION
D
5
D
G
O
D
6
D
G
O
D
7
n
inputs enters the
D
G
O