LP2966IMM-5050 National Semiconductor, LP2966IMM-5050 Datasheet - Page 6

• Manufacturer Part Number: LP2966IMM-5050
• Manufacturer: National Semiconductor

Specifications of LP2966IMM-5050

• Date_code: 04+

Electrical Characteristics
(Continued)
Note 13: Output voltage tolerance specification also includes the line regulation and load regulation.
Note 14: LP2966 has fold back current limited short circuit protection. The knee is the current at which the output voltage drops 10% below the nominal value.
Note 15: V
is the shutdown pin voltage threshold below which the output is disabled.
SDT
+ 1V applies when Vout1 = Vout2. If Vout1 ≠ Vout2, then this condition would apply to the output which is greater in value.
Note 16: The condition V
= V
IN
O(NOM)
As an example, if Vout1 = 3.3V and Vout2 = 5V, then the condition V
= V
+ 1V would apply to Vout2 only.
IN
O(NOM)
Note 17: Turn-on delay is the time interval between the low to high transition on the shutdown pin to the output voltage settling to within 5% of the nominal value.
Turn-off delay is the time interval between the high to low transition on the shutdown pin to the output voltage dropping below 50% of the nominal value. The external
load impedance influences the output voltage decay in shutdown mode.
Note 18: The limits for the ground pin current specification, I
will be same as the limits for the specification, I
.
GND(0,1)
GND(1,0)
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