ADSP-BF532 Analog Devices, ADSP-BF532 Datasheet
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ADSP-BF532
Manufacturer Part Number
ADSP-BF532
Description
Manufacturer
Analog Devices
Specifications of ADSP-BF532
Case
BGA
Date_code
09+
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FEATURES
Up to 600 MHz high performance Blackfin processor
0.8 V to 1.2 V core V
3.3 V and 2.5 V tolerant I/O
160-ball mini-BGA, 169-ball lead free PBGA, and 176-lead
MEMORY
Up to 148K bytes of on-chip memory:
Two dual-channel memory DMA controllers
Memory Management Unit providing memory protection
Blackfin and the Blackfin logo are registered trademarks of Analog Devices, Inc.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs,
RISC-like register and instruction model for ease of pro-
Advanced debug, trace, and performance monitoring
LQFP packages
16K bytes of instruction SRAM/Cache
64K bytes of instruction SRAM
32K bytes of data SRAM/Cache
32K bytes of data SRAM
4K bytes of scratchpad SRAM
40-bit Shifter
gramming and compiler-friendly support
DD
with on-chip voltage regulation
REGULATOR
VOLTAGE
JTAG TEST AND
EMULATION
INSTRUCTION
MEMORY
CORE / SYSTEM BUS INTERFACE
L1
B
CONTROLLER/
CORE TIMER
Figure 1. Functional Block Diagram
EVENT
ADSP-BF531/ADSP-BF532/ADSP-BF533
MMU
CONTROLLER
BOOT ROM
DMA
MEMORY
DATA
L1
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
External Memory Controller with glueless support for
Flexible memory booting options from SPI and external
PERIPHERALS
Parallel Peripheral Interface (PPI)/GPIO, supporting
Two dual-channel, full duplex synchronous serial ports, sup-
12-channel DMA controller
SPI compatible port
Three Timer/Counters with PWM support
UART with support for IrDA®
Event Handler
Real-Time Clock
Watchdog Timer
Debug/JTAG interface
On-chip PLL capable of 1x to 63x frequency multiplication
Core Timer
SDRAM, SRAM, FLASH, and ROM
memory
ITU-R 656 video data formats
porting eight stereo I
Embedded Processor
© 2004 Analog Devices, Inc. All rights reserved.
WATCHDOG TIMER
SERIAL PORTS (2)
REAL-TIME CLOCK
EXTERNAL PORT
TIMER0, TIMER1,
FLASH, SDRAM
UART PORT
PPI / GPIO
CONTROL
2
SPI PORT
S channels
TIMER2
IRDA®
Blackfin®
www.analog.com