74ALVC573PW,118 NXP Semiconductors, 74ALVC573PW,118 Datasheet - Page 4

• Manufacturer Part Number: 74ALVC573PW,118
• Description: IC OCTAL D TRANSP LATCH 20TSSOP
• Manufacturer: NXP Semiconductors
• Series: 74ALVCr

Specifications of 74ALVC573PW,118

• Logic Type: D-Type Transparent Latch
• Package / Case: 20-TSSOP
• Circuit: 8:8
• Output Type: Tri-State
• Voltage - Supply: 1.65 V ~ 3.6 V
• Independent Circuits: 1
• Delay Time - Propagation: 2.2ns
• Current - Output High, Low: 24mA, 24mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Circuits: 8
• Logic Family: ALVC
• Polarity: Non-Inverting
• Input Bias Current (max): 0.2 uA
• High Level Output Current: - 24 mA
• Low Level Output Current: 24 mA
• Propagation Delay Time: 2.2 ns at 3.3 V
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 1.65 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 74ALVC573PW-T; 74ALVC573PW-T; 935269736118

NXP Semiconductors
5. Pinning information
Table 2.
74ALVC573_3
Product data sheet
Symbol
D[0:7]
LE
OE
Q[0:7]
V
GND
Fig 6. Pin configuration SO20 and TSSOP20
CC
Pin description
GND
OE
D0
D1
D2
D3
D4
D5
D6
D7
5.1 Pinning
5.2 Pin description
Pin
2, 3, 4, 5, 6, 7, 8, 9
11
1
19, 18, 17, 16, 15, 14, 13, 12
20
10
10
1
2
3
4
5
6
7
8
9
573
001aad099
20
19
18
17
16
15
14
13
12
11
V
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
LE
CC
Rev. 03 — 26 October 2007
Description
data input
latch enable input (active HIGH)
output enable input (active LOW)
3-state latch output
supply voltage
ground (0 V)
Fig 7. Pin configuration DHVQFN20
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as
a supply pin or input.
index area
terminal 1
Octal D-type transparent latch; 3-state
D0
D1
D2
D3
D4
D5
D6
D7
Transparent top view
2
3
4
5
6
7
8
9
GND
573
(1)
74ALVC573
19
18
17
16
15
14
13
12
001aad100
© NXP B.V. 2007. All rights reserved.
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
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