MC100EPT26D ON Semiconductor, MC100EPT26D Datasheet

MC100EPT26D

Manufacturer Part Number

MC100EPT26D

Description

Manufacturer

ON Semiconductor

Datasheets

1.MC100EPT26D.pdf (9 pages)

2.MC100EPT26D.pdf (4 pages)

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MC100EPT26

3.3V 1:2 Fanout Differential

LVPECL/LVDS to LVTTL

Translator

Description

LVTTL translator. Because LVPECL (Positive ECL) or LVDS levels are

used only +3.3 V and ground are required. The small outline 8−lead

package and the 1:2 fanout design of the EPT26 makes it ideal for

applications which require the low skew duplication of a signal in a

tightly packed PC board.

mode. In this mode the V

non−inverting buffer or the D0 input for an inverting buffer. If used,

the V

For a single−ended direct connection, use an external voltage

reference source such as a resistor divider. Do not use V

single−ended direct connection or port to another device.

Features

•

August, 2008 − Rev. 15

The MC100EPT26 is a 1:2 Fanout Differential LVPECL/LVDS to

The V

1.4 ns Typical Propagation Delay

Maximum Frequency > 275 MHz Typical

The 100 Series Contains Temperature Compensation

Operating Range: V

24 mA TTL outputs

Q Outputs Will Default LOW with Inputs Open or at V

Pb−Free Packages are Available

Output

pin should be bypassed to ground with > 0.01 mF capacitor.

output allows the EPT26 to be used in a single−ended input

= 3.0 V to 3.6 V with GND = 0 V

output is tied to the D0 input for a

for a

See detailed ordering and shipping information in the package

dimensions section on page 5 of this data sheet.

*For additional marking information, refer to

Application Note AND8002/D.

(Note: Microdot may be in either location)

ORDERING INFORMATION

A = Assembly Location

L = Wafer Lot

Y = Year

W = Work Week

M = Date Code

G = Pb−Free Package

http://onsemi.com

CASE 948R

DT SUFFIX

CASE 751

D SUFFIX

TSSOP−8

CASE 506AA

MN SUFFIX

SO−8

DFN8

Publication Order Number:

DIAGRAMS*

MC100EPT26/D

MARKING

KPT26

3W MG

ALYW

ALYWG

KA26

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