W25P022AF-6 Winbond, W25P022AF-6 Datasheet

W25P022AF-6

Manufacturer Part Number

W25P022AF-6

Description

Manufacturer

Winbond

Datasheet

1.W25P022AF-6.pdf (17 pages)

Specifications of W25P022AF-6

Case

QFP-100

Date_code

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GENERAL DESCRIPTION

The W25P022A is a high-speed, low-power, synchronous-burst pipelined CMOS static RAM

organized as 65,536

address counter supports both Pentium

executed is controlled by the LBO pin. Pipelining or non-pipelining of the data outputs is controlled by

the FT pin. A snooze mode reduces power dissipation.

The W25P022A supports both 2T/2T mode and 2T/1T mode, which can be selected by pin 42. The

default mode is 2T/1T, with pin 42 low. To switch to 2T/2T mode, bias pin 42 to V

pin 42 should not be changed after power up. The 2T/2T mode will sustain one cycle of valid data

output in a burst read cycle when the device is deselected by CE2/ CE3 . This mode supports 3-1-1-1-

1-1-1-1 in a two-bank, back-to-back burst read cycle. On the other hand, the 2T/1T mode disables

data output within one cycle in a burst read cycle when the device is deselected by CE2/ CE3 . In this

mode, the device supports only 3-1-1-1-2-1-1-1 in a two-bank, back-to-back burst read cycle.

FEATURES

BLOCK DIAGRAM

Synchronous operation

High-speed access time: 6/7 nS (max.)

Single +3.3V power supply

Individual byte write capability

3.3V LVTTL compatible I/O

Clock-controlled and registered input

Asynchronous output enable

64K

32 bits that operates on a single 3.3-volt power supply. A built-in two-bit burst

BW(4:1)

CE(3:1)

A(15:0)

ADSC

ADSP

BWE

ADV

CLK

LBO

32 BURST PIPELINED HIGH-SPEED

CONTROL

REGISTE

INPUT

LOGIC

burst mode and linear burst mode. The mode to be

- 1 -

DATA I/O

Pipelined/non-pipelined data output capability

Supports snooze mode (low-power state)

Internal burst counter supports Intel burst mode

& linear burst mode

Supports both 2T/2T & 2T/1T mode

Packaged in 100-pin QFP or TQFP

64K X 32

ARRAY

CORE

Publication Release Date: September 1996

CMOS STATIC RAM

I/O(32:1)

W25P022A

DDQ

. The state of

Revision A1

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