S29JL032H70TAI020 SPANSION, S29JL032H70TAI020 Datasheet

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S29JL032H70TAI020

Manufacturer Part Number
S29JL032H70TAI020
Description
TSOP48
Manufacturer
SPANSION

Specifications of S29JL032H70TAI020

Date_code
07+

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Part Number
Manufacturer
Quantity
Price
Part Number:
S29JL032H70TAI020
Manufacturer:
ATHEROS
Quantity:
230
S29JL032H
32 Megabit (4 M x 8-Bit/2 M x 16-Bit)
CMOS 3.0 Volt-only, Simultaneous Read/Write
Flash Memory
This document contains information on a product under development at FASL LLC. The information is intended to help you evaluate this product. FASL LLC reserves the
right to change or discontinue work on this proposed product without notice.
Distinctive Characteristics
Architectural Advantages
Package options
Performance Characteristics
Simultaneous Read/Write operations
— Data can be continuously read from one bank while
— Zero latency between read and write operations
Multiple Bank architecture
— Four bank architectures available (refer to Table 2).
Boot Sectors
— Top and bottom boot sectors in the same device
— Any combination of sectors can be erased
Manufactured on 0.13 µm process technology
SecSi™ (Secured Silicon) Sector: Extra 256 Byte
sector
— Factory locked and identifiable: 16 bytes available for
— Customer lockable: One-time programmable only.
Zero Power Operation
— Sophisticated power management circuits reduce
Compatible with JEDEC standards
— Pinout and software compatible with single-power-
48-pin TSOP
High performance
— Access time as fast as 55 ns
— Program time: 4 µs/word typical using accelerated
executing erase/program functions in another bank.
secure, random factory Electronic Serial Number;
verifiable as factory locked through autoselect
function.
Once locked, data cannot be changed
power consumed during inactive periods to nearly
zero.
supply flash standard
programming function
Publication Number S29JL032H
Revision A
Software Features
Hardware Features
Amendment 0
Ultra low power consumption (typical values)
— 2 mA active read current at 1 MHz
— 10 mA active read current at 5 MHz
— 200 nA in standby or automatic sleep mode
Cycling Endurance: 1 million cycles per sector
typical
Data Retention: 20 years typical
Supports Common Flash Memory Interface (CFI)
Erase Suspend/Erase Resume
— Suspends erase operations to read data from, or
Data# Polling and Toggle Bits
— Provides a software method of detecting the status of
Unlock Bypass Program command
— Reduces overall programming time when issuing
Ready/Busy# output (RY/BY#)
— Hardware method for detecting program or erase
Hardware reset pin (RESET#)
— Hardware method of resetting the internal state
WP#/ACC input pin
— Write protect (WP#) function protects the two
— Acceleration (ACC) function accelerates program
Sector protection
— Hardware method to prevent any program or erase
— Temporary Sector Unprotect allows changing data in
program data to, a sector that is not being erased,
then resumes the erase operation.
program or erase cycles
multiple program command sequences
cycle completion
machine to the read mode
outermost boot sectors regardless of sector protect
status
timing
operation within a sector
protected sectors in-system
Issue Date May 21, 2004
ADVANCE INFORMATION

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