MC10H113L ON Semiconductor, MC10H113L Datasheet

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MC10H113L

Manufacturer Part Number
MC10H113L
Description
IC GATE XOR QUAD ECL 16-CDIP
Manufacturer
ON Semiconductor
Series
10Hr
Datasheet

Specifications of MC10H113L

Logic Type
XOR (Exclusive OR)
Number Of Inputs
2
Number Of Circuits
4
Current - Output High, Low
50mA, 50mA
Voltage - Supply
0 V ~ 5.2 V
Operating Temperature
0°C ~ 75°C
Mounting Type
Through Hole
Package / Case
16-CDIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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MC10H113
Quad Exclusive OR Gate
Description
common to all four gates. The outputs may be wire−ORed together to
perform a 4−bit comparison function (A = B). The enable is active
LOW.
Features
*For additional information on our Pb−Free strategy and soldering details, please
© Semiconductor Components Industries, LLC, 2006
February, 2006 − Rev. 8
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
The MC10H113 is a Quad Exclusive OR Gate with an enable
Temperature Range)
Propagation Delay, 1.3 ns Typical
Power Dissipation 175 mW Typ/Pkg (No Load)
Improved Noise Margin 150 mV (Over Operating Voltage and
Voltage Compensated
MECL 10K™ Compatible
Pb−Free Packages are Available*
1
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
16
20 1
*For additional marking information, refer to
CASE 620A
SOEIAJ−16
FN SUFFIX
Application Note AND8002/D.
CASE 648
CASE 966
CASE 775
1
P SUFFIX
L SUFFIX
PLLC−20
CDIP−16
PDIP−16
A
WL, L
YY, Y
WW, W = Work Week
G
ORDERING INFORMATION
http://onsemi.com
= Assembly Location
= Wafer Lot
= Year
= Pb−Free Package
16
MARKING DIAGRAMS*
1
Publication Order Number:
16
1
MC10H113L
AWLYYWW
AWLYYWW
AWLYYWWG
MC10H113P
10H113G
ALYWG
10H113
1 20
MC10H113/D

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MC10H113L Summary of contents

Page 1

... WW Work Week G = Pb−Free Package *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet MC10H113L AWLYYWW 1 MC10H113P AWLYYWWG 10H113 ALYWG 1 20 10H113G AWLYYWW Publication Order Number: ...

Page 2

TRUTH TABLE CC1 V CC2 Figure 1. Logic Diagram Table 1. MAXIMUM ...

Page 3

... ORDERING INFORMATION Device MC10H113FN MC10H113FNG MC10H113FNR2 MC10H113FNR2G MC10H113L MC10H113M MC10H113MG MC10H113MEL MC10H113MELG MC10H113P MC10H113PG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 0° ...

Page 4

Y BRK −L− −M− 0.007 (0.180) Z 0.007 (0.180 −T− J VIEW S G1 0.010 (0.250) T L− NOTES: 1. DIMENSIONS AND TOLERANCING PER ANSI Y14.5M, ...

Page 5

VIEW 0.10 (0.004) 0.13 (0.005 0.25 (0.010) PACKAGE DIMENSIONS SOEIAJ−16 CASE 966−01 ISSUE ...

Page 6

... American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 6 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. ...

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