CDP1853CE Intersil Corporation, CDP1853CE Datasheet

CDP1853CE

Manufacturer Part Number

CDP1853CE

Description

DIP-16

Manufacturer

Intersil Corporation

Datasheets

1.CDP1853CE.pdf (6 pages)

2.CDP1853CE.pdf (6 pages)

Specifications of CDP1853CE

Date_code

02+

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Meier Automation Equipment Co., Limited

Part Number:

CDP1853CE

Manufacturer:

RCA

Quantity:

20 000

Current page: 1 of 6
Download datasheet (33Kb)

March 1997

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

http://www.intersil.com or 407-727-9207

CLK A

OUT 0

OUT 1

OUT 2

OUT 3

Features

• Provides Direct Control of Up to 7 Input and 7 Output

• CHIP ENABLE (CE) Allows Easy Expansion for Multi-

Ordering Information

Pinout

PDIP

SBDIP

PACKAGE TEMP. RANGE

Devices

level I/O Systems

Burn-In

16 LEAD DIP

TOP VIEW

-40

C to +85

CLK B

OUT 4

OUT 5

OUT 6

OUT 7

C CDP1853CE CDP1853E E16.3

C CDP1853CD CDP1853D D16.3

CDP1853CEX

CDP1853CDX

CDP1853 Functional Diagram

CLOCK

(TPB)

(TPA)

Intersil Corporation 1999

10V

FIGURE 1.

E16.3

D16.3

DECODER

PKG.

NO.

1 OF 8

4-35

Description

The CDP1853 and CDP1853C are 1 of 8 decoders designed for

use in general purpose microprocessor systems. These

devices, which are functionally identical, are speciﬁcally

designed for use as gated N-bit decoders and interface directly

with the 1800-series microprocessors without additional compo-

nents. The CDP1853 has a recommended operating voltage

range of 4V to 10.5V, and the CDP1853C has a recommended

operating voltage range of 4V to 6.5V.

When CHIP ENABLE (CE) is high, the selected output will be

true (high) from the trailing edge of CLOCK A (high-to-low tran-

sition) to the trailing edge of CLOCK B (high-to-low transition).

All outputs will be low when the device is not selected (CE = 0)

and during conditions of CLOCK A and CLOCK B as shown in

Figure 2. The CDP1853 inputs N0, N1, N2, CLOCK A, and

CLOCK B are connected to an 1800-series microprocessor out-

puts N0, N1, N2, TPA, and TPB respectively, when used to

decode I/O commands as shown in Figure 5. The CHIP

ENABLE (CE) input provides the capability for multiple levels of

decoding as shown in Figure 6.

The CDP1853 can also be used as a general 1 of 8 decoder for

I/O and memory system applications as shown in Figure 4.

The CDP1853 and CDP1853C are supplied in hermetic 16-lead

dual-in-line ceramic (D sufﬁx) and plastic (E sufﬁx) packages.

OUT 0

OUT 1

OUT 2

OUT 3

OUT 4

OUT 5

OUT 6

OUT 7

† Qn-1 = Enable remains in previous state.

1 = High level, 0 = Low level, X = Don’t care

CDP1853C

CL A

CDP1853,

TRUTH TABLE

N-Bit 1 of 8 Decoder

0 1 2 3 4 5 6 7

1 0 0 0 0 0 0 0

0 1 0 0 0 0 0 0

0 0 1 0 0 0 0 0

0 0 0 1 0 0 0 0

0 0 0 0 1 0 0 0

0 0 0 0 0 1 0 0

0 0 0 0 0 0 1 0

0 0 0 0 0 0 0 1

0 0 0 0 0 0 0 0

File Number

CL B

Qn-1†

1189.2

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