CDP1802BCE Intersil Corporation, CDP1802BCE Datasheet

CDP1802BCE

Manufacturer Part Number

CDP1802BCE

Description

DIP-40

Manufacturer

Intersil Corporation

Datasheets

1.CDP1802ACDX.pdf (27 pages)

2.CDP1802BCE.pdf (28 pages)

Specifications of CDP1802BCE

Date_code

02+

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Download datasheet (118Kb)

March 1997

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

http://www.intersil.com or 407-727-9207

Features

• Maximum Input Clock Maximum Frequency Options

• Minimum Instruction Fetch

• Any Combination of Standard RAM and ROM Up to

• 8

• 16 x 16 Matrix of Registers for Use as Multiple

• On

• Programmable Single

• 91 Easy

Ordering Information

At V

- CDP1802A, AC . . . . . . . . . . . . . . . . . . . . . . . . . 3.2MHz

- CDP1802BC. . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.0MHz

At V

- CDP1802A, AC . . . . . . . . . . . . . . . . . . . . . . . . . 6.4MHz

At V

- CDP1802A, AC . . . . . . . . . . . . . . . . . . . . . . . . . . 5.0 s

- CDP1802BC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2 s

65,536 Bytes

and Multiplexed Address Bus

Program Counters, Data Pointers, or Data Registers

Bit Parallel Organization With Bidirectional Data Bus

Chip DMA, Interrupt, and Flag Inputs

= 5V

= 10V

= 5V

Use Instructions

CDP1802ACE

CDP1802ACEX

CDP1802ACQ

CDP1802ACD

CDP1802ACDX

5V - 3.2MHz

PART NUMBER

Bit Output Port

Execute Times

CDP1802BCE

CDP1802BCEX

CDP1802BCQ

CDP1802BCDX

5V - 5MHz

Intersil Corporation 1999

TEMPERATURE RANGE

-40

CDP1802A, CDP1802AC,

C to +85

3-3

Description

The CDP1802 family of CMOS microprocessors are 8-bit

for use as general purpose computing or control elements in

a wide range of stored program systems or products.

The CDP1802 types include all of the circuits required for

fetching, interpreting, and executing instructions which have

been stored in standard types of memories. Extensive

input/output (I/O) control features are also provided to facili-

tate system design.

The 1800 series architecture is designed with emphasis on

the total microcomputer system as an integral entity so that

systems having maximum ﬂexibility and minimum cost can

be realized. The 1800 series CPU also provides a synchro-

nous interface to memories and external controllers for I/O

devices, and minimizes the cost of interface controllers. Fur-

ther, the I/O interface is capable of supporting devices oper-

ating in polled, interrupt driven, or direct memory access

modes.

The CDP1802A and CDP1802AC have a maximum input

clock frequency of 3.2MHz at V

CDP1802AC are functionally identical. They differ in that the

CDP1802A has a recommended operating voltage range of

4V to 10.5V, and the CDP1802AC a recommended operat-

ing voltage range of 4V to 6.5V.

The CDP1802BC is a higher speed version of the

CDP1802AC, having a maximum input clock frequency of

5.0MHz at V

range of 4V to 6.5V.

PDIP

PLCC

SBDIP

CMOS 8-Bit Microprocessors

= 5V, and a recommended operating voltage

Burn-In

PACKAGE

CDP1802BC

E40.6

N44.65

D40.6

PKG. NO.

= 5V. The CDP1802A and

File Number

1305.2

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