74ACTQ240PC Fairchild Semiconductor, 74ACTQ240PC Datasheet - Page 7

IC INVERTER DUAL 4-INPUT 20DIP

74ACTQ240PC

Manufacturer Part Number
74ACTQ240PC
Description
IC INVERTER DUAL 4-INPUT 20DIP
Manufacturer
Fairchild Semiconductor
Series
74ACTQr
Datasheet

Specifications of 74ACTQ240PC

Logic Type
Inverter
Number Of Inputs
4
Number Of Circuits
2
Current - Output High, Low
24mA, 24mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Package / Case
20-DIP (0.300", 7.62mm)
Logic Family
ACTQ
Number Of Channels Per Chip
8
Polarity
Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
8 / 3
Output Type
3-State
Propagation Delay Time
7 ns at 5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74ACTQ240
©1989 Fairchild Semiconductor Corporation
74ACQ240, 74ACTQ240 Rev. 1.6
FACT Noise Characteristics
The setup of a noise characteristics measurement is crit-
ical to the accuracy and repeatability of the tests. The
following is a brief description of the setup used to mea-
sure the noise characteristics of FACT.
Equipment:
Procedure:
1. Verify Test Fixture Loading: Standard Load 50pF,
2. Deskew the HFS generator so that no two channels
3. Terminate all inputs and outputs to ensure proper
4. Set the HFS generator to toggle all but one output at a
5. Set the HFS generator input levels at 0V LOW and 3V
Notes:
14. V
15. Input pulses have the following characteristics:
Hewlett Packard Model 8180A Word Generator
PC-163A Test Fixture
Tektronics Model 7854 Oscilloscope
Figure 1. Quiet Output Noise Voltage Waveforms
500Ω.
have greater than 150 ps skew between them. This
requires that the oscilloscope be deskewed first. It is
important to deskew the HFS generator channels
before testing. This will ensure that the outputs switch
simultaneously.
loading of the outputs and that the input levels are at
the correct voltage.
frequency of 1MHz. Greater frequencies will increase
DUT heating and affect the results of the
measurement.
HIGH for ACT devices and 0V LOW and 5V HIGH for
AC devices. Verify levels with an oscilloscope.
reference.
f = 1MHz, t
OHV
and V
r
OLP
= 3ns, t
are measured with respect to ground
f
= 3ns, skew < 150ps.
7
V
V
OLP
ILD
Determine the quiet output pin that demonstrates the
greatest noise levels. The worst case pin will usually
be the furthest from the ground pin. Monitor the output
voltages using a 50Ω coaxial cable plugged into a
standard SMB type connector on the test fixture.
Do not use an active FET probe.
Measure V
the worst case transition for active and enable.
Measure V
the worst case active and enable transition.
Verify that the GND reference recorded on the
oscilloscope has not drifted to ensure the accuracy
and repeatability of the measurements.
Monitor one of the switching outputs using a 50Ω
coaxial cable plugged into a standard SMB type
connector on the test fixture. Do not use an active
FET probe.
First increase the input LOW voltage level, V
the output begins to oscillate or steps out a min of
2ns. Oscillation is defined as noise on the output LOW
level that exceeds V
that exceed V
which oscillation occurs is defined as V
Next decrease the input HIGH voltage level, V
the output begins to oscillate or steps out a min of 2ns.
Oscillation is defined as noise on the output LOW
level that exceeds V
that exceed V
which oscillation occurs is defined as V
Verify that the GND reference recorded on the
oscilloscope has not drifted to ensure the accuracy
and repeatability of the measurements.
Figure 2. Simultaneous Switching Test Circuit
and V
/V
OLV
IHD
and V
OLP
OHP
:
IH
IH
and V
and V
limits. The input HIGH voltage level at
limits. The input LOW voltage level at
OHP
IL
IL
/V
OLV
OHV
limits, or on output HIGH levels
limits, or on output HIGH levels
OHV
on the quiet output during
on the quiet output during
:
ILD
IHD
www.fairchildsemi.com
.
.
IL
, until
IH
, until

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