AM29LV641MH SPANSION [SPANSION], AM29LV641MH Datasheet
AM29LV641MH
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AM29LV641MH Summary of contents
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Data Sheet This product has been retired and is not available for designs. For new and current designs, S29GL064A supersedes Am29LV641M H/L and is the factory-recommended migration path. Please refer to the S29GL064A datasheet for specifications and ordering information. Availability ...
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... Am29LV641MH/L 64 Megabit ( 16-Bit) MirrorBit™ 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O™ Control This product has been retired and is not available for designs. For new and current designs, S29GL064A supersedes Am29LV641M H/L and is the factory-recommended migration path. DISTINCTIVE CHARACTERISTICS Please refer to the S29GL064A datasheet for specifications and ordering information. Availability of this document is retained for reference and historical purposes only. ...
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... GENERAL DESCRIPTION The Am29LV641MH Mbit, 3.0 volt single power supply flash memory devices organized as 4,194,304 words. The devices have a 16-bit wide data bus, and can be programmed either in the host system or in standard EPROM programmers. An access time of 90, 100, 110, or 120 ns is available. ...
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... Ball Fortified BGA Implementing a Common Layout for AMD MirrorBit → Prod- and Intel StrataFlash Memory Devices → Tech- AMD MirrorBit™ White Paper Migrating from Single-byte to Three-byte Device IDs Am29LV641MH/L RY/BY# WP#, ACC WP# Protection Yes ACC only No WP Kbyte top Yes WP#/ACC pin ...
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... Figure 26. Alternate CE# Controlled Write (Erase/Program) Operation Timings.......................................................................... 51 Erase And Programming Performance Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 52 TSOP Pin Capacitance . . . . . . . . . . . . . . . . . . . . . 53 Data Retention Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 54 TS 048—48-Pin Standard Thin Small Outline Package ......... 54 TSR048—48-Pin Reverse Thin Small Outline Package ......... 55 Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 56 Am29LV641MH/L December 21, 2005 ...
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... Max. OE# Access Time 25 (ns) Notes: 1. See “AC Characteristics” for full specifications. 2. For the Am29LV641MH/L device, the last numeric digit in the speed option (e.g. 101, 112, 120) is used for internal purposes only. Please use OPNs as listed when placing orders. BLOCK DIAGRAM V CC ...
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... CC DQ11 13 DQ3 14 DQ10 15 DQ2 16 DQ9 17 DQ1 18 DQ8 19 DQ0 48-Pin Standard TSOP 48-Pin Reverse TSOP Am29LV641MH/L 48 A16 DQ15 44 DQ7 43 DQ14 42 DQ6 41 DQ13 40 DQ5 39 DQ12 38 DQ4 DQ11 35 ...
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... CC (see Product Selector Guide for speed options and voltage supply tolerances Output Buffer power Device Ground Pin Not Connected Internally December 21, 2005 LOGIC SYMBOL 22 A21–A0 CE# OE# WE# WP# ACC RESET Am29LV641MH/L 16 DQ15–DQ0 7 ...
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... Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly re- leased combinations. Note: For the Am29LV641MH/L device, the last numeric digit in the speed option (e.g. 101, 112, 120) is used for internal purposes only. Please use OPNs as listed when placing orders. 8 ...
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... This ensures that no spurious alteration of the memory content occurs during the power transition. No com- mand is necessary in this mode to obtain array data. Standard microprocessor read cycles that assert valid addresses on the device address inputs produce valid Am29LV641MH/L Addresses DQ0– (Note 2) DQ15 A ...
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... The device automatically enables this mode when addresses remain stable for t 30 ns. The automatic sleep mode is independent of the CE#, WE#, and OE# control signals. Standard ad- dress access timings provide new data when ad- Am29LV641MH/L on this pin, the device auto- HH Autoselect Mode and ...
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... Refer to the AC Characteristics rameters and to Figure 17 for the timing diagram. Output Disable Mode When the OE# input disabled. The output pins are placed in the high impedance state. Am29LV641MH/L ±0.3 V, the device RESET# is held CC4 ±0.3 V, the standby current will SS tables for RESET# pa- ...
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... SA102 1 1 238000–23FFFF SA103 1 1 240000–247FFF SA104 1 1 248000–24FFFF SA105 1 1 250000–257FFF SA106 1 1 258000–25FFFF SA107 1 1 Am29LV641MH/L 16-bit Address Range A21–A15 (in hexadecimal 100000–107FFF 108000–10FFFF 110000–117FFF ...
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... SA122 1 1 2D8000–2DFFFF SA123 1 1 2E0000–2E7FFF SA124 1 1 2E8000–2EFFFF SA125 1 1 2F0000–2F7FFF SA126 1 1 2F8000–2FFFFF SA127 1 1 Am29LV641MH/L 16-bit Address Range A21–A15 (in hexadecimal 360000–367FFF 368000–36FFFF 370000–377FFF ...
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... Sector Address Don’t care. IH Am29LV641MH/L . Refer to the Autoselect Com- ID section for more information DQ15 to DQ0 0001h 227Eh 2213h ...
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... SA88–SA91 SA92–SA95 SA96–SA99 SA100–SA103 SA104–SA107 SA108–SA111 SA112–SA115 SA116–SA119 SA120–SA123 SA124–SA127 Note: All sector groups are 128 Kwords in size. Am29LV641MH/L Address Table A21–A17 00000 00001 00010 00011 00100 00101 00110 00111 ...
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... Notes: 1. All protected sector groups unprotected (If WP the first or last sector will remain protected). 2. All previously protected sector groups are protected once again. Figure 1. Temporary Sector Group Unprotect Operation Am29LV641MH/L START RESET (Note 1) Perform Erase or Program Operations RESET ...
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... Reset PLSCNT = 1 Increment PLSCNT No Yes PLSCNT = 1000? Yes Device failed Sector Group Unprotect Algorithm Am29LV641MH/L START PLSCNT = 1 RESET Wait 1 μs Temporary Sector No First Write Group Unprotect Cycle = 60h? Mode Yes All sector No groups ...
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... To verify the protect/unprotect status of the SecSi Sector, follow the algorithm shown in Figure 3. Once the SecSi Sector is programmed, locked and verified, the system must write the Exit SecSi Sector Region command sequence to return to reading and writing within the remainder of the array. Am29LV641MH/L Command Definitions This IH ...
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... For further information, please refer to the CFI Specifi- cation and CFI Publication 100, available via the World Wide Web at http://www.amd.com/flash/cfi. Alterna- tively, contact an AMD representative for copies of these documents. Am29LV641MH/L power- the device does not ac- LKO is greater than V ...
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... Max. timeout for byte/word write 2 times typical N Max. timeout for buffer write 2 times typical Max. timeout per individual block erase 2 N Max. timeout for full chip erase 2 times typical (00h = not supported) Am29LV641MH/L Description Description N µs N µ s (00h = not supported ...
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... Number of Erase Block Regions within device (01h = uniform device, 02h = boot device) Erase Block Region 1 Information (refer to the CFI specification or CFI publication 100) Erase Block Region 2 Information (refer to CFI publication 100) Erase Block Region 3 Information (refer to CFI publication 100) Erase Block Region 4 Information (refer to CFI publication 100) Am29LV641MH ...
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... Embedded Program or Embedded Erase algorithm. After the device accepts an Erase Suspend command, the device enters the erase-suspend-read mode, after Am29LV641MH/L AC Characteristics section for timing December 21, 2005 ...
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... Programming is a four-bus-cycle operation. The pro- gram command sequence is initiated by writing two unlock write cycles, followed by the program set-up command. The program address and data are written next, which in turn initiate the Embedded Program al- gorithm. The system is not required to provide further Am29LV641MH/L A7:A0 00h 01h 0Eh 0Fh ...
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... Write Buffer Programming operation. The device then begins programming. Data polling should be used while monitoring the last address location loaded into the write buffer. DQ7, DQ6, DQ5, and DQ1 should be monitored to determine the device status during Write Buffer Programming. Am29LV641MH/L –A . All subsequent ad- MAX ...
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... ACC pin must not accelerated programming, or device damage may re- sult. Figure 5 illustrates the algorithm for the program oper- ation. Refer to the table in the AC Characteristics section for parameters, and Figure 18 for timing diagrams. Am29LV641MH for operations other than HH Erase and Program Operations 25 ...
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... Yes No 4. Yes Yes No PASS Am29LV641MH/L When Sector Address is specified, any address in the selected sector is acceptable. However, when loading Write-Buffer address locations with data, all addresses must fall within the selected Write-Buffer Page. Therefore, DQ7 should be verified. DQ5= “1”, then the device FAILED. If this flowchart location was reached because DQ1= “ ...
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... Program Suspend mode and continue the programming opera- tion. Further writes of the Resume command are ig- nored. Another Program Suspend command can be written after the device has resume programming. Am29LV641MH/L Write Operation Status for more 27 ...
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... Erase Suspend during the time-out period resets the device to the read mode. The system must re- write the command sequence and any additional ad- dresses and commands. Note that the SecSi Sector, autoselect, and CFI functions are unavailable when an erase operation is in progress. Am29LV641MH/L section for infor- ta- December 21, 2005 ...
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... Note that the additional suspends do not affect device reliability or future performance. In most systems rapid erase/suspend activity occurs only briefly. In this ex- ample, erase performance will not be significantly im- pacted. Am29LV641MH/L section for infor- section for more and Autoselect Command Sequence 29 ...
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... Data Poll to Erasing Bank from System No Data = FFh? Yes Erasure Completed Notes: 1. See Table 10 for erase command sequence. 2. See the section on DQ3 for information on the sector erase timer. Figure 7. Erase Operation Embedded Erase algorithm in progress Am29LV641MH/L December 21, 2005 ...
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... The Erase Suspend command is valid only during a sector erase operation. 16. The Erase Resume command is valid only during the Erase Suspend mode. 17. Command is valid when device is ready to read array data or when device is in autoselect mode. Am29LV641MH/L Addr Data Addr Data Addr X00 ...
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... During chip erase, a valid address is any non-protected sector address. 2. DQ7 should be rechecked even if DQ5 = “1” because DQ7 may change simultaneously with DQ5. Figure 8. Data# Polling Algorithm Am29LV641MH/L section shows the Data# Yes No Yes Yes ...
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... Reset Command Note: The system should recheck the toggle bit even if DQ5 = “1” because the toggle bit may stop toggling as DQ5 changes to “1.” See the subsections on DQ6 and DQ2 for more information. Figure 9. Toggle Bit Algorithm Am29LV641MH/L No Yes Yes No Yes ...
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... DQ3 prior to and following each subsequent sector erase com- mand. If DQ3 is high on the second status check, the last command might not have been accepted. Table 11 shows the status of DQ3 relative to the other status bits. Am29LV641MH/L Sector Erase Command December 21, 2005 ...
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... Table 11. Write Operation Status DQ7 (Note 2) DQ6 (Note 1) DQ7# Toggle 0 Toggle Invalid (not allowed toggle DQ7# Toggle DQ7# Toggle DQ7# Toggle Am29LV641MH/L Write Buffer section for more details. DQ5 DQ2 DQ3 (Note 2) DQ1 0 N/A No toggle 0 1 Toggle N/A Data 0 N/A Toggle ...
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... The I/Os will not operate when V 1 +0.8 V –0.5 V –2.0 V Figure 10 +0 –2.0 V for SS Figure 11. /V range Am29LV641MH Maximum Negative Overshoot Waveform Maximum Positive Overshoot Waveform December 21, 2005 ...
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... min I = –2.0 mA min I = –100 µ min max < minimum V for CE# and DQ I/ Am29LV641MH/L Min Typ Max ±1 ±1 pin ...
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... Note < INPUTS Steady Changing from Changing from Does Not Apply Center Line is High Impedance State (High Z) Measurement Level . IO Figure 13. Input Waveforms and Measurement Levels Am29LV641MH/L All Speeds 1 TTL gate 0.0–3.0 1.5 0 the reference level is 0 ...
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... Contact AMD for information on AC operation with Addresses Stable t ACC OEH t CE HIGH Z Figure 14. Read Operation Timings Am29LV641MH/L Speed Options 101R, 101 112R 112 120R 120 100 110 120 100 110 120 100 110 120 ...
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... AC CHARACTERISTICS A21-A2 A1-A0 Data Bus CE# OE Same Page PACC PACC t ACC Qa Qb Figure 15. Page Read Timings Am29LV641MH PACC Qc Qd December 21, 2005 ...
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... Min Min = V . Contact AMD for information on AC operation with Addresses Stable t ACC OEH t CE HIGH Z Figure 16. Read Operation Timings Am29LV641MH/L All Speed Options 20 500 500 50 20 ≠ HIGH Z Output Valid Unit μ μ ...
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... CE#, OE# RESET# CE#, OE# RESET Ready Reset Timings NOT during Embedded Algorithms Reset Timings during Embedded Algorithms t Ready t RP Figure 17. Reset Timings Am29LV641MH/L December 21, 2005 ...
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... Min Min Min Min Min Min Min Min Typ Typ Typ Typ Typ Typ Min Min Max = V . Contact AMD for information on AC operation with Am29LV641MH/L Speed Options 90R 101 112 120 Unit 90 100 110 120 ...
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... POLL WPH A0h t BUSY is the true data at the program address. OUT Figure 18. Program Operation Timings Am29LV641MH/L Read Status Data (last two cycles WHWH1 D Status OUT VHH December 21, 2005 ...
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... SA = sector address (for Sector Erase Valid Address for reading status data (see “Write Operation Status”. 2. These waveforms are for the word mode. Figure 20. Chip/Sector Erase Operation Timings December 21, 2005 555h for chip erase WPH t DH 30h 10 for Chip Erase Am29LV641MH/L Read Status Data WHWH2 In Complete Progress 45 ...
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... Note Valid address. Illustration shows first status cycle after command sequence, last status read cycle, and array data read cycle ACC Complement Complement Status Data Status Data Figure 21. Data# Polling Timings (During Embedded Algorithms) Am29LV641MH/L VA High Z True Valid Data High Z True Valid Data December 21, 2005 ...
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... OEPH t OE Valid Valid Status Status (second read) Figure 22. Toggle Bit Timings (During Embedded Algorithms) Enter Erase Suspend Program Erase Erase Suspend Suspend Read Program Figure 23. DQ2 vs. DQ6 Am29LV641MH/L Valid Valid Data Status (stops toggling) Erase Resume Erase Erase Complete Read 47 ...
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... VIDR CE# WE# Figure 24. Temporary Sector Group Unprotect Timing Diagram Min Min = V . Contact AMD for information on AC operation with Program or Erase Command Sequence t RSP Am29LV641MH/L All Speed Options Unit 500 ns 4 µs ≠ ...
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... For sector group protect, A6:A0 = 0xx0010. For sector group unprotect, A6:A0 = 1xx0010. Figure 25. Sector Group Protect and Unprotect Timing Diagram December 21, 2005 Valid* Valid* Verify 60h 40h Sector Group Protect: 150 µs, Sector Group Unprotect Am29LV641MH/L Valid* Status 49 ...
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... Min Min Min Min Min Min Min Min Typ Typ Typ Typ Typ Typ Min Max = V . Contact AMD for information on AC operation with Am29LV641MH/L Speed Options 101, 112, 120, 90R 101R 112R 120R Unit 90 100 110 120 ...
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... Data# Polling POLL t GHEL t t WHWH1 CPH t BUSY for program PD for program 55 for erase 30 for sector erase 10 for chip erase is the data written to the device. OUT Operation Timings Am29LV641MH/L PA DQ7#, D OUT DQ15 51 ...
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... V, worst case temperature. Maximum values are valid up to and including 100,000 –100 mA = 3.0 V, one pin at a time. CC Am29LV641MH/L Comments Excludes 00h programming prior to erasure (Note 6) Excludes system level overhead (Note 7) . Programming specifications assume that CC 10 Min Max – ...
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... MHz. A DATA RETENTION Parameter Description Minimum Pattern Data Retention Time December 21, 2005 Test Setup OUT Test Conditions 150°C 125°C Am29LV641MH/L Typ Max Unit 6 7 Min Unit 10 Years 20 Years 53 ...
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... PHYSICAL DIMENSIONS TS 048—48-Pin Standard Thin Small Outline Package Am29LV641MH/L Dwg rev AA; 10/99 December 21, 2005 ...
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... PHYSICAL DIMENSIONS TSR048—48-Pin Reverse Thin Small Outline Package December 21, 2005 Am29LV641MH/L Dwg rev AA; 10/99 55 ...
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... Added second bullet, SecSi sector-protect verify text and figure 3. SecSi Sector Flash Memory Region, and Enter SecSi Sector/Exit SecSi Sector Command Sequence Noted that the ACC function and unlock bypass modes are not available when the SecSi sector is enabled. Am29LV641MH/L and t standard for the PACC OE December 21, 2005 ...
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... For new and current designs, S29GL064A supersedes Am29LV641M H/L and is the factory-rec- ommended migration path. Please refer to the S29GL064A datasheet for specifications and ordering information. Availability of this document is retained for reference and historical purposes only. Am29LV641MH/L . Program Operation Data# Polling Timings (During Alternate CE# Timings. ...
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... AMD, the AMD logo, and combinations thereof are registered trademarks of Advanced Micro Devices, Inc. ExpressFlash is a trademark of Advanced Micro Devices, Inc. Product names used in this publication are for identification purposes only and may be trademarks of their respective companies Am29LV641MH/L December 21, 2005 ...