AM29LV641GH53R SPANSION [SPANSION], AM29LV641GH53R Datasheet
AM29LV641GH53R
Related parts for AM29LV641GH53R
AM29LV641GH53R Summary of contents
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Data Sheet This product has been retired and is not recommended for designs. For new and current designs, S29GL064A supersedes Am29LV641G and is the factory-recommended migration path. Please refer to the S29GL064A datasheet for specifications and ordering information. Availability of ...
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ADVANCE INFORMATION Am29LV641G 64 Megabit ( 16-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O ™ Control This product has been retired and is not recommended for designs. For new and current designs, S29GL064A supersedes Am29LV641G and ...
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GENERAL DESCRIPTION The Am29LV641G are 64 Mbit, 3.0 volt (3 3.6 V) single power supply flash memory devices organized as 4,194,304 words. Data appears on DQ15–DQ0. These devices are designed to ...
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TABLE OF CONTENTS Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4 Block Diagram . . . ...
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PRODUCT SELECTOR GUIDE Part Number Regulated Voltage Range V Speed Option Standard Voltage Range V Max Access Time (ns) CE# Access Time (ns) OE# Access Time (ns) Note: See “AC Characteristics” for full ...
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CONNECTION DIAGRAMS A15 1 A14 2 A13 3 A12 4 A11 5 A10 A21 9 A20 10 WE# 11 RESET# 12 ACC 13 WP# 14 A19 15 A18 ...
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CONNECTION DIAGRAMS A13 A12 WE# RESET RY/BY# ACC A17 ...
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CONNECTION DIAGRAMS A8 RFU RFU A7 A13 A12 WE# RESET# A4 RY/BY# WP#/ACC A3 A7 A17 RFU RFU Special Package Handling Instructions Special handling is required for ...
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PIN DESCRIPTION A21– Addresses inputs DQ15–DQ0 = 16 Data inputs/outputs CE# = Chip Enable input OE# = Output Enable input WE# = Write Enable input WP# = Hardware Write Protect input ...
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... Volt-only Read, Program, and Erase Valid Combinations for TSOP and SSOP Packages Am29LV641GH73, Am29LV641GL73 EI, FI Am29LV641GH53R, Am29LV641GL53R Marking Converstion For the Am29LV641GH/L/AmLV640GU Enhanced-V the last digit of the speed indicator specifies V grades ending in 3 (e.g. 93, 103, etc.) indicate a 3 Volt V range; speed grades ending in 8 (e.g. 98, 108, etc.) indicate a 1 ...
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DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory ...
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enabled for read access until the command register contents are altered. See “Requirements for Reading Array Data” for more information. Refer to the AC Read-Only Operations table for timing specifications and to Figure ...
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Refer to the AC Characteristics tables for RESET# pa- rameters and to Figure 15 for the timing diagram. Sector A21 A20 A19 A18 SA0 SA1 SA2 0 ...
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Table 2. Sector Address Table (Continued) Sector A21 A20 A19 A18 SA31 SA32 SA33 SA34 SA35 SA36 0 ...
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Table 2. Sector Address Table (Continued) Sector A21 A20 A19 A18 SA66 SA67 SA68 SA69 SA70 SA71 1 ...
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Table 2. Sector Address Table (Continued) Sector A21 A20 A19 A18 SA101 SA102 SA103 SA104 SA105 SA106 1 ...
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Autoselect Mode The autoselect mode provides manufacturer and de- vice identification, and sector protection verification, through identifier codes output on DQ7–DQ0. This mode is primarily intended for programming equip- ment to automatically match ...
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Sector Group Protection and Unprotection The hardware sector group protection feature disables both program and erase operations in any sector group. In this device, a sector group consists of four adjacent sectors that ...
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Write Protect (WP#) The Write Protect function provides a hardware method of protecting the first or last sector without using the system asserts V on the WP# pin, the ...
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START PLSCNT = 1 RESET Wait 1 μs Temporary Sector No First Write Group Unprotect Cycle = 60h? Mode Yes Set up sector group address Sector Group Protect: Write 60h ...
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SecSi™ (Secured Silicon) Sector Flash Memory Region The SecSi (Secured Silicon) Sector feature provides a Flash memory region that enables permanent part identification through an Electronic Serial Number (ESN). The SecSi Sector is ...
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START If data = 00h, RESET# = SecSi Sector unprotected. If data = 01h, SecSi Sector is Wait 1 μs protected. Write 60h to any address Remove ...
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Addresses (x16) Data 10h 0051h 11h 0052h 12h 0059h 13h 0002h 14h 0000h 15h 0040h 16h 0000h 17h 0000h 18h 0000h 19h 0000h 1Ah 0000h Addresses (x16) Data 1Bh 0027h 1Ch 0036h 1Dh ...
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31h 007Eh 32h 0000h 33h 0000h 34h 0001h 35h 0000h 36h 0000h 37h 0000h 38h 0000h 39h 0000h 3Ah 0000h 3Bh 0000h 3Ch 0000h June 14, 2005 ...
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Table 9. Primary Vendor-Specific Extended Query Addresses (x16) Data 40h 0050h 41h 0052h 42h 0049h 43h 0031h 44h 0033h 45h 0004h 46h 0002h 47h 0004h 48h 0001h 49h 0004h 4Ah 0000h 4Bh 0000h ...
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See also Requirements for Reading Array Data in the Device Bus Operations section for more information. The Read-Only Operations table provides the read pa- rameters, and Figure 14 shows the timing diagram. Reset ...
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from “0” back to a “1.” Attempting may cause the device to set DQ5 = 1, or cause the DQ7 and DQ6 status bits to indicate the operation was suc- ...
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When the Embedded Erase algorithm is complete, the device returns to the read mode and addresses are no longer latched. The system can determine the status of the erase operation by using DQ7, ...
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Refer to the Write Operation Status section for more information. In the erase-suspend-read mode, the system can also issue the autoselect command sequence. Refer to the Autoselect Mode and Autoselect Command Sequence sections ...
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Command Definitions Command Sequence (Note 1) Addr Read (Note Reset (Note 7) 1 XXX Manufacturer ID 4 555 Device ID 4 555 SecSi™ Sector Factory 4 555 Protect (Note 9) ...
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WRITE OPERATION STATUS The device provides several bits to determine the status of a program or erase operation: DQ2, DQ3, DQ5, DQ6, and DQ7. Table 11 and the following subsections describe the function ...
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program or erase operation), and during the sector erase time-out. During an Embedded Program or Erase algorithm op- eration, successive read cycles to any address cause DQ6 to toggle. The system may use ...
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DQ2: Toggle Bit II The “Toggle Bit II” on DQ2, when used with DQ6, indi- cates whether a particular sector is actively erasing (that is, the Embedded Erase algorithm is in progress), or ...
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Status Embedded Program Algorithm Standard Mode Embedded Erase Algorithm Erase Suspended Sector Erase-Suspend-Re Erase ad Suspend Non-Erase Suspended Mode Sector Erase-Suspend-Program Notes: 1. DQ5 switches to ‘1’ when an Embedded Program or Embedded ...
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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . –65 ° +150 ° C Ambient Temperature with Power ...
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CHARACTERISTICS CMOS Compatible Parameter Symbol Parameter Description I Input Load Current (Note A9, ACC Input Load Current LIT I Output Leakage Current LO V Active Read Current CC I ...
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CHARACTERISTICS Zero-Power Flash 500 1000 Note: Addresses are switching at 1 MHz Figure 10. I Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 ...
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TEST CONDITIONS Device Under Test C 6.2 k Ω L Note: Diodes are IN3064 or equivalent Figure 12. Test Setup KEY TO SWITCHING WAVEFORMS WAVEFORM Don’t Care, Any Change Permitted 3.0 V 1.5 ...
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CHARACTERISTICS Read-Only Operations Parameter JEDEC Std. Description t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV ...
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CHARACTERISTICS Hardware Reset (RESET#) Parameter JEDEC Std RESET# Pin Low (During Embedded Algorithms) t Ready to Read Mode (See Note) RESET# Pin Low (NOT During Embedded t Ready Algorithms) to Read Mode ...
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CHARACTERISTICS Erase and Program Operations Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL AS t Address Setup Time to OE# low ...
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CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE# OE Data VCS Notes program address program data, ...
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CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 2AAh CE Data 55h t VCS V CC Notes sector address ...
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CHARACTERISTICS t RC Addresses VA t ACC OE# t OEH WE# DQ7 DQ6–DQ0 Note Valid address. Illustration shows first status cycle after command ...
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CHARACTERISTICS Addresses CE# t OEH WE# OE Valid Data DQ6/DQ2 (first read) Note Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, ...
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CHARACTERISTICS Temporary Sector Unprotect Parameter JEDEC Std Description t V Rise and Fall Time (See Note) VIDR ID RESET# Setup Time for Temporary Sector t RSP Unprotect Note: Not 100% tested. V ...
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CHARACTERISTICS RESET# SA, A6, A1, A0 Sector Group Protect or Unprotect Data 60h 1 µs CE# WE# OE# * For sector group protect ...
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CHARACTERISTICS Alternate CE# Controlled Erase and Program Operations Parameter JEDEC Std Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold ...
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CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes: 1. Figure indicates last two bus cycles of a ...
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ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time Word Program Time Accelerated Word Program Time Chip Program Time (Note 3) Notes: 1. Typical program and erase times assume the following ...
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PHYSICAL DIMENSIONS FBE063—63-Ball Fine-Pitch Ball Grid Array (FBGA package Am29LV641G Dwg rev AF; 10/99 June 14, 2005 ...
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PHYSICAL DIMENSIONS LAA064–64-Ball Fortified Ball Grid Array (Fortified BGA package Am29LV641G June 14, 2005 ...
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PHYSICAL DIMENSIONS TS 048—48-Pin Standard TSOP ) Note: For reference only. BSC is an ANSI standard for Basic Space Centering. June 14, 2005 ...
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REVISION SUMMARY Revision A (August 9, 2002) Initial Release. Revision A+1 (August 28, 2002) Ordering Information Corrected order numbers and package markings. Added Marking Convention explanation about En- hanced-V markings. IO Revision A+2 ...