BBS-1080S BOSER [BOSER Technology Co., Ltd], BBS-1080S Datasheet - Page 46

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BBS-1080S

Manufacturer Part Number
BBS-1080S
Description
Manufacturer
BOSER [BOSER Technology Co., Ltd]
Datasheet
5.6
This section allows you to configure the system based on the specific
features of the installed chipset. This chipset manages bus speeds and
the access to the system memory resources, such as DRAM and the
external cache. It also coordinates the communications between the
conventional ISA and PCI buses. It must be stated that these items
should never be altered. The default settings have been chosen
because they provide the best operating conditions for your system.
You might consider and make any changes only if you discover that the
data has been lost while using your system.
NOTE:
38
DRAM Timing Selectable
CAS Latency Time
Active to Precharge Delay
DRAM RAS# to CAS# Delay
DRAM RAS# Precharge
Turbo Mode
Memory Frequency For
System BIOS Cacheable
Video BIOS Cacheable
Memory Hole At 15M-16M
Delayed Transaction
Delay Prior to Thermal
AGP Aperture Size (MB)
On-chip VGA
On-chip Frame Buffer size
Boot Display
Panel Scaling
Panel Number
F5: Previous Values
Panel Number: 1 (Default Panel 1: TOSHIBA LTM10C348F)
** ON-chip VGA Setting **
: Select Item
Advanced Chipset Setup
Phoenix – AwardBIOS CMOS Setup Utility
F6: Fail-Safe Defaults
+ / - /PU/PD: Value
Advanced Chipset Features
[7]
[3]
[Disabled]
[Auto]
[Disabled]
[16Min]
[8MB]
[CRT]
[Auto]
[1]
[By SPD]
[1.5]
[3]
[Enabled]
[Enabled]
[Enabled]
[64]
[Enabled]
F10: Save
F7: Optimized Defaults
ESC: Quit
Item Help
Menu Level
F1: General Help

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