AM29LV116B AMD [Advanced Micro Devices], AM29LV116B Datasheet
AM29LV116B
Related parts for AM29LV116B
AM29LV116B Summary of contents
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... PRELIMINARY Am29LV116B 16 Megabit ( 8-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory DISTINCTIVE CHARACTERISTICS Single power supply operation — Full voltage range: 2.7 to 3.6 volt read and write operations for battery-powered applications — Regulated voltage range: 3.0 to 3.6 volt read and write operations and for compatibility with high performance 3.3 volt microprocessors Manufactured on 0.35 µ ...
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... GENERAL DESCRIPTION The Am29LV116B Mbit, 3.0 Volt-only Flash memory organized as 2,097,152 bytes. The device is offered in a 40-pin TSOP package. The byte-wide (x8) data appears on DQ7–DQ0. All read, program, and erase operations are accomplished using only a single power supply. The device can also be programmed in standard EPROM programmers ...
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... =3.0–3 2.7–3 Sector Switches Erase Voltage Generator PGM Voltage Generator Chip Enable Output Enable Logic Y-Decoder STB Timer X-Decoder Am29LV116B Am29LV116B 80R 90 120 80 90 120 80 90 120 – DQ0 DQ7 Input/Output Buffers Data ...
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... DQ3 13 DQ2 14 DQ1 15 DQ0 40-Pin Standard TSOP 40-Pin Reverse TSOP Am29LV116B A17 A20 37 A19 36 A10 DQ7 35 DQ6 34 DQ5 33 DQ4 DQ3 ...
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... RY/BY# = Ready/Busy output V = 3.0 volt-only single power supply CC (see Product Selector Guide for speed options and voltage supply tolerances Device ground Pin not connected internally LOGIC SYMBOL 21 A0–A20 CE# OE# WE# RESET# Am29LV116B 8 DQ0–DQ7 RY/BY# 21359C-3 ...
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... T 80R Valid Combinations Am29LV116BT80R, Am29LV116BB80R Am29LV116BT90, Am29LV116BB90 EC, EI, EE, FC, FI, FE Am29LV116BT120, Am29LV116BB120 OPTIONAL PROCESSING Blank = Standard Processing B = Burn-in (Contact an AMD representative for more information) TEMPERATURE RANGE C = Commercial (0°C to +70° Industrial (–40°C to +85° Extended (– ...
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... The command register itself does not occupy any addressable memory location. The register is composed of latches that store the com- mands, along with the address and data information needed to execute the command. The contents of the Table 1. Am29LV116B Device Bus Operations Operation Read Write Standby ...
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... Refer to the AC Characteristics tables for RESET# pa- rameters and to Figure 14 for the timing diagram. Output Disable Mode When the OE# input disabled. The output pins are placed in the high imped- ance state. Am29LV116B in the DC Characteristics table CC5 RP ±0.3 V, the device RESET# is held CC4 ± ...
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... Table 2. Am29LV116BT Top Boot Sector Address Table Sector A20 A19 A18 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 ...
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... Table 3. Am29LV116BB Bottom Boot Sector Address Table Sector A20 A19 A18 A17 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 ...
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... When using programming equipment, the autoselect mode requires V (11 12 address pin ID A9. Address pins A6, A1, and A0 must be as shown in Table 4. Am29LV116B Autoselect Codes (High Voltage Method) Description CE# Manufacturer ID: AMD L Device ID: Am29LV116B L ...
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... Reset PLSCNT = 1 Increment PLSCNT No Yes PLSCNT = 1000? Yes Device failed Sector Unprotect Algorithm Am29LV116B START PLSCNT = 1 RESET Wait First Write Temporary Sector Cycle = 60h? Unprotect Mode Yes No All sectors protected? Yes ...
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... Power-Up Write Inhibit If WE device does not accept commands on the rising edge of WE#. The internal state machine is automatically reset to reading array data on power-up. Am29LV116B CC Write Inhibit is less than V , the device does not ac- LKO . The system must provide the ...
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... Typical timeout for full chip erase 2 N Max. timeout for byte/word write 2 N Max. timeout for buffer write 2 times typical Max. timeout per individual block erase 2 N Max. timeout for full chip erase 2 Am29LV116B Description Description N µs N µs (00h = not supported ...
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... Not Supported Number of sectors in per group Sector Temporary Unprotect Not Supported Supported Sector Protect/Unprotect scheme 01 = 29F040 mode 29F016 mode 29F400 mode 29LV800A mode Simultaneous Operation Not Supported Supported Burst Mode Type Not Supported Supported Page Mode Type Not Supported Word Page Word Page Am29LV116B N ...
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... DQ7, DQ6, or RY/BY#. See “Write Operation Status” for information on these status bits. Any commands written to the device during the Em- bedded Program Algorithm are ignored. Note that a hardware reset immediately terminates the program- ming operation. The Byte Program command se- Am29LV116B ID 16 ...
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... Characteristics” for parameters, and to Figure 15 for timing diagrams Embedded Program algorithm in progress Increment Address Note: See Table 9 for program command sequence. Figure 3. Program Operation Am29LV116B START Write Program Command Sequence Data Poll from System Verify Data? No Yes No Last Address? ...
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... After the erase operation has been suspended, the system can read array data from or program data to any sector not selected for erasure. (The device “erase Am29LV116B 18 ...
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... START Write Erase Command Sequence Data Poll from System No Data = FFh? Erasure Completed Notes: 1. See Table 9 for erase command sequence. 2. See “DQ3: Sector Erase Timer” for more information. Figure 4. Erase Operation Am29LV116B Embedded Erase algorithm in progress Yes 21359C-7 ...
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... Table 9. Am29LV116B Command Definitions Command Sequence (Note 1) Addr Read (Note Reset (Note 6) 1 XXX Manufacturer ID 4 555 Device ID, Top Boot Block 4 555 Device ID, Bottom Boot Block Sector Protect 4 555 Verify (Note 8) Byte Program 4 555 Unlock Bypass 3 555 Unlock Bypass Program ...
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... During chip erase, a valid address is any non-protected sector address. 2. DQ7 should be rechecked even if DQ5 = “1” because DQ7 may change simultaneously with DQ5. Figure 5. Data# Polling Algorithm Am29LV116B Yes Yes PASS 21359C-8 ...
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... DQ5 went high. If the toggle bit is no longer toggling, the device has successfully completed the program or erase operation still toggling, the device did not completed the operation successfully, and the system Am29LV116B 22 ...
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... Complete, Write Reset Command Notes: 1. Read toggle bit twice to determine whether or not it is toggling. See text. 2. Recheck toggle bit because it may stop toggling as DQ5 changes to “1”. See text. Figure 6. Toggle Bit Algorithm Am29LV116B (Note 1) No Yes Yes (Notes Yes ...
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... Table 10 shows the outputs for DQ3. Table 10. Write Operation Status DQ7 DQ5 (Note 2) DQ6 (Note 1) DQ7# Toggle 0 0 Toggle toggle 0 Data Data Data DQ7# Toggle 0 Am29LV116B DQ2 DQ3 (Note 2) RY/BY# N/A No toggle 0 1 Toggle 0 N/A Toggle 1 Data Data 1 N/A N ...
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... Operating ranges define those limits between which the func- tionality of the device is guaranteed +0.8 V –0.5 V –2 Figure 7. Maximum Negative Overshoot Waveform +0.5 V 2.0 V Figure 8. Maximum Positive Overshoot Waveform Am29LV116B 21359C- 21359C-11 ...
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... 4.0 mA min I = –2 min I = –100 µ min . Typical specifications are for V IH Am29LV116B Min Typ Max Unit 1.0 µA 35 µA 1.0 µ 0.2 5 µA 0.2 5 µA 0.2 5 µA –0.5 0.8 ...
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... Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 Note 1000 1500 2000 Time Frequency in MHz Figure 10. Typical I vs. Frequency CC1 Am29LV116B 2500 3000 3500 3 4000 21359C-12 5 21359C-13 ...
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... Input Pulse Levels Input timing measurement reference levels Output timing measurement reference levels 21359C-14 INPUTS Steady Changing from Changing from Does Not Apply Center Line is High Impedance State (High Z) Measurement Level Am29LV116B 80R 90, 120 Unit 1 TTL gate L 30 100 0.0–3 ...
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... Test Setup Read Toggle and Data# Polling t RC Addresses Stable t ACC OEH t CE HIGH Z Output Valid Figure 13. Read Operations Timings Am29LV116B Speed Option 80R 90 120 Min 80 90 120 IL Max 80 90 120 IL Max 80 90 120 IL Max 30 ...
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... RESET Test Setup Ready Reset Timings NOT during Embedded Algorithms Reset Timings during Embedded Algorithms t Ready t RP Figure 14. RESET# Timings Am29LV116B All Speed Options Unit Max 20 µs Max 500 ns Min 500 ns Min 50 ns Min 20 µ ...
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... See the “Erase and Programming Performance” section for more information 80R Min 80 Min Min 45 Min 35 Min Min Min Min Min Min 35 Min Typ Typ Min Min Min Am29LV116B 90 120 Unit 90 120 ...
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... OUT Figure 15. Program Operation Timings 555h for chip erase WPH 55h 30h 10 for Chip Erase t Am29LV116B Read Status Data (last two cycles WHWH1 Status D OUT t RB Read Status Data WHWH2 In Complete Progress t BUSY RB ...
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... Complement Complement Status Data Status Data Valid Status Valid Status (first read) (second read) Am29LV116B VA High Z True Valid Data High Z True Valid Data 21359C- Valid Status Valid Data (stops toggling) 21359C-21 ...
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... Enter Erase Suspend Program Erase Erase Suspend Suspend Read Program Figure 19. DQ2 vs. DQ6 Min Min Program or Erase Command Sequence t RSP Am29LV116B Erase Resume Erase Erase Complete Read 21359C-22 All Speed Options Unit 500 4 t VIDR 21359C-23 ns µ ...
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... WE# OE# Note: For sector protect For sector unprotect Figure 21. Sector Protect/Unprotect Timing Diagram Valid* Valid* 60h Sector Protect: 100 µs Sector Unprotect Am29LV116B Valid* Verify 40h Status 21359C-24 ...
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... See the “Erase and Programming Performance” section for more information 80R Min 80 Min Min 45 Min 35 Min Min Min Min Min Min 35 Min Typ Typ Am29LV116B 90 120 Unit 90 120 ...
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... PA for program SA for sector erase 555 for chip erase Data# Polling GHEL t t WHWH1 CPH t BUSY for program PD for program 55 for erase 30 for sector erase 10 for chip erase Am29LV116B PA DQ7# D OUT = data written to OUT 21359C-25 ...
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... V, 1,000,000 cycles. CC –100 mA = 3.0 V, one pin at a time. CC Test Setup OUT V IN Test Conditions 150 C 125 C Am29LV116B Unit Comments s Excludes 00h programming prior to erasure (Note 4) s µs Excludes system level overhead (Note 1,000,000 cycles. Additionally, CC Min Max –1.0 V 12.5 V – ...
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... TSR040—40-Pin Reverse TSOP (measured in millimeters) Pin 1 I. 1.20 MAX 0.25MM (0.0098") BSC * For reference only. BSC is an ANSI standard for Basic Space Centering 18.30 18.50 19.80 20.20 0˚ 5˚ 18.30 18.50 19.80 20.20 0˚ 5˚ 0.50 0.70 Am29LV116B 0.95 1.05 9.90 10.10 0.50 BSC 0.05 0.15 0.08 16-038-TSOP-1_AC 0.20 TS 040 0.10 4-25-96 lv 0.21 0.50 0.70 1.05 9.90 10.10 0.50 BSC 0.05 0.15 16-038-TSOP-1_AC 0.08 TSR040 0.20 4-25-96 lv ...
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... Figure 21, Sector Protect/Unprotect Timing Diagram A valid address is not required for the first write cycle; only the data 60h. Erase and Programming Performance In Note 2, the worst case endurance is now 1 million cycles. Am29LV116B . These parameters are WHWH2 . VCS . This parameter is not VIDR 40 ...