EVALNV1D ICHAUS [IC-Haus GmbH], EVALNV1D Datasheet - Page 8

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EVALNV1D

Manufacturer Part Number
EVALNV1D
Description
6-BIT Sin/D FLASH CONVERTER
Manufacturer
ICHAUS [IC-Haus GmbH]
Datasheet
Resolution, frequency ranges
Nine different resolutions or interpolation factors (IPF) can be programmed via inputs SF0 and SF1. Resolutions
16, 12 and 10 are generated at the core of the converter itself. Resolutions of less than 10 are produced by
division DIV in the digital processing unit. The minimum transition distance at outputs A and B corresponds to that
of the transition distance control multiplied by the divisor of the digital processing unit.
The minimum output transition distance (maximum output frequency) should be adjusted to tarry with the overall
system (bandwidth of the transfer medium, sampling rate of the counter). The maximum input frequency is
determined by the transition distance control and the resolution of the converter core (16, 12 or 10). This
frequency can be increased for resolutions of less than 10 with an external resistor at RCLK. The following table
gives possible settings.
iC-NV
6-BIT Sin/D FLASH CONVERTER
A/B OUTPUT PHASE SELECTION
RESOLUTION
open
open
open
SF1
open
open
ROT
hi
hi
hi
lo
lo
lo
lo
lo
hi
hi
open
open
open
SF0
hi
lo
hi
lo
hi
lo
negative; SIN leading COS
negative; SIN leading COS
negative; SIN leading COS
positive; COS leading SIN
positive; COS leading SIN
positive; COS leading SIN
Input signals
IPF
16
12
10
8
5
4
3
2
1
internal
division
DIV
16
1
1
1
2
2
4
4
8
1.04 MHz, RCLK= 12 kΩ
(3.2 MHz), RCLK= 3 kΩ
200 kHz, RCLK= 47 kΩ
260 kHz, RCLK= 47 kΩ
320 kHz, RCLK= 47 kΩ
400 kHz, RCLK= 23 kΩ
640 kHz, RCLK= 23 kΩ
800 kHz, RCLK= 12 kΩ
1.6 MHz, RCLK= 6 kΩ
Output signals A, B; Z
B leading A; MSB
A leading B; MSB
B leading A; Z
A leading B; Z
A leading B; Z
B leading A; Z
fin
MAX
or RCLK= 47 kΩ
for RCLK= VCC
200 kHz
260 kHz
320 kHz
200 kHz
320 kHz
200 kHz
260 kHz
200 kHz
200 kHz
fin
MAX
Rev C1, Page 8/19

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