LF2242 LODEV [LOGIC Devices Incorporated], LF2242 Datasheet - Page 2

• Manufacturer Part Number: LF2242
• Description: 12/16-bit Half-Band Interpolating/ Decimating Digital Filter
• Manufacturer: LODEV [LOGIC Devices Incorporated]

SIGNAL DEFINITIONS
Power
V
+5 V power supply. All pins must be
connected.
Clock
CLK — Master Clock
The rising edge of CLK strobes all regis-
ters. All timing specifications are refer-
enced to the rising edge of CLK.
SYNC — Synchronization Control
Incoming data is synchronized by hold-
ing SYNC HIGH on CLK
bringing SYNC LOW on CLK
the first word of input data. SYNC is held
LOW until resynchronization is desired,
or it can be toggled at half the clock rate.
For interpolation (INT = LOW), input
data should be presented at the first ris-
ing edge of CLK for which SYNC is LOW
and then at every alternate rising edge of
CLK thereafter. SYNC is inactive if DEC
and INT are equal (pass-through mode).
DEVICES INCORPORATED
F
CC
IGURE
and GND
1. F
–10
–20
–30
–40
–50
–60
–70
–80
0
REQUENCY
0
N
, and then by
0.1
R
FREQUENCY (NORMALIZED)
N+1
ESPONSE OF
S
with
0.2
S
Inputs
SI
12-bit two’s complement data input
port. Data is latched into the register on
the rising edge of CLK. The LSB is SI
(Figure 2).
Outputs
SO
The current 16-bit result is available on
the SO
ensures that a valid full-scale (7FFF
positive or 8000 negative) output will be
generated in the event of an internal
overflow. The LSB is SO
11–0
F
15-0
ILTER
0.3
— Data Input
15-0
Data Output
S
outputs. The LF2242’s limiter
0.4
2
S
0
0.5
(Figure 2).
S
12/16-bit Half-Band Interpolating/
0
Controls
INT — Interpolation Control
When INT is LOW and DEC is HIGH
(Table 1), the device internally forces
every other incoming data sample to
zero. This effectively halves the input
data rate and the output amplitude.
DEC — Decimation Control
When DEC is LOW and INT is HIGH
(Table 1), the output register is strobed on
every other rising edge of CLK (driven at
half the clock rate), decimating the output
data stream.
*Input and output registers run at full
clock rate
T
INT
Decimating Digital Filter
0
0
1
1
Video Imaging Products
ABLE
DEC
1. M
0
1
0
1
Pass-through*
Interpolate
Decimate
Pass-through*
ODE
S
MODE
08/16/2000–LDS.2242-K
ELECTION
LF2242