AS7C256A-10JC ALSC [Alliance Semiconductor Corporation], AS7C256A-10JC Datasheet - Page 6

• Manufacturer Part Number: AS7C256A-10JC
• Description: 5V 32K X 8 CMOS SRAM (Common I/O)
• Manufacturer: ALSC [Alliance Semiconductor Corporation]

9/24/04; v.1.2
AC test conditions
Notes
1
2
3
4
5
6
7
8
9
10 C=30pF, except on High Z and Low Z parameters, where C=5pF.
- Output load: see Figure B
- Input pulse level: GND to V
- Input rise and fall times: 2 ns. See Figure A.
- Input and output timing reference levels: 1.5V.
GND
During V
For test conditions, see AC Test Conditions, Figures A, B.
These parameters are specified with CL = 5pF, as in Figures B. Transition is measured
This parameter is guaranteed, but not tested.
WE is High for read cycle.
CE and OE are Low for read cycle.
Address valid prior to or coincident with CE transition Low.
All read cycle timings are referenced from the last valid address to the first transitioning address.
All write cycle timings are referenced from the last valid address to the first transitioning address.
V
CC
10%
CC
Figure A: Input pulse
90%
power-up, a pull-up resistor to V
2 ns
90%
10%
CC
See Figure A.
CC
Alliance Semiconductor
on CE is required to meet I
Figure B: Output load
D
out
255
Ω
SB
®
specification.
+5.0V
480
C
GND
±
10
500mV from steady-state voltage.
Ω
D
out
Thevenin equivalent
168
Ω
+1.72V
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AS7C256A