LRS13023 Sharp, LRS13023 Datasheet - Page 38
LRS13023
Manufacturer Part Number
LRS13023
Description
Stacked Chip 8M Flash and 1M SRAM
Manufacturer
Sharp
Datasheet
1.LRS13023.pdf
(61 pages)
- Current page: 38 of 61
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NOTES:
1. Read timing
2. Sampled,
3. Refer to Table 4 for valid A,
4. V,
during read-onry
write, or lock-bit configuration
AC CHARACTERISTICS
should be held at V,,,
SHARP
Write Cycle *
Rp High Recovery to WE Going Low
a
not 100% tested.
characteristics
Setup
operations.
to WE Going Lqw
Width
rime
LD
to m
--
during block erase, byte write and lock-bit configuration
( and if necessary TRf should be held at V,)
Parameter
- WRITE OPERATION(‘)
and b
Refer to AC Characteristics
ing High
success (SR1/3/4/5=0).
Goi ng High
for block erase, byte write, or lock-bit CM@.uation.
Vo=27V-3.6V,
LRS13023
T,=O’C
for read-only
Notes
2
2
2
3
to +85”C
I
operations.
untilidetermination.of
Min
130
100
100
10
50
50
1
operations
Max
block erase, byte
are the same as
..
unit
ns
P
ns
ns
ns
ns
ns
-1
I
1
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