HIP0063AB Intersil Corporation, HIP0063AB Datasheet - Page 2

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HIP0063AB

Manufacturer Part Number
HIP0063AB
Description
Hex Low Side MOSFET Driver with Serial or Parallel Interface and Diagnostic Fault Control
Manufacturer
Intersil Corporation
Datasheet
HLOS (SEL)
HPW01
HPW45
FIGURE 1. TYPICAL APPLICATION CIRCUIT FOR THE HIP0063 SHOWING HOW THE GATE DRIVE OUTPUT AND DRAIN MONITOR
FIGURE 2. SPI DATA AND CLOCK TIMING DIAGRAM. SERIAL COMMUNICATION IS INITIATED WHEN CS GOES LOW AND SCK
S0
SI
SCK
CS
INPUT CONTROLS TWO HIP0061 THREE FET ARRAYS
IS LOW. 8 OR 16 BITS OF DATA IS CLOCKED INTO SI ON THE LEADING EDGE OF SCK. DATA IS CLOCKED OUT OF
SO ON THE TRAIL EDGE OF SCK. WHEN CS GOES HIGH, DATA IS LATCHED TO CONTROL EACH CHANNEL
PI0
PI1
PI2
PI3
PI4
PI5
HLOS
SPI
(CPOL = 0, CPHA = 1)
PARALLEL/
SERIAL IN,
SHIFT REG.
CONTROL
PARALLEL/
SERIAL IN,
SHIFT REG.
CONTROL
PARALLEL/
SERIAL IN,
SHIFT REG.
CONTROL
PARALLEL/
SERIAL IN,
SHIFT REG.
CONTROL
PARALLEL/
SERIAL IN,
SHIFT REG.
CONTROL
PARALLEL/
SERIAL IN,
SHIFT REG.
CONTROL
SCK
CS
HARDWARE GENERATED OR CUSTOM LOGIC
SOURCED PWM CONTROL SIGNAL INPUTS
LATCH
LATCH
LATCH
LATCH
LATCH
LATCH
DATA
DATA
DATA
DATA
DATA
DATA
MSB
INTERNAL STROBE FOR DATA CAPTURE
V
CC
POR, TIMING OSC,
BAND GAP REF.,
OVER-VOLT. DET.
DRIVE CONTROL
DRIVE CONTROL
DRIVE CONTROL
DRIVE CONTROL
DRIVE CONTROL
DRIVE CONTROL
6
5V
CHANNEL #0
CHANNEL #1
CHANNEL #2
CHANNEL #3
CHANNEL #4
CHANNEL #5
HIP0063
5
GND
2
V
PWR
4
14V
3
DRAIN MONITOR
DRAIN MONITOR
DRAIN MONITOR
DRAIN MONITOR
DRAIN MONITOR
DRAIN MONITOR
GATE DRIVER
GATE DRIVER
GATE DRIVER
GATE DRIVER
GATE DRIVER
GATE DRIVER
HIP0063
2
1
G0
G1
G2
G3
G4
G5
LSB
D0
D1
D2
D3
D4
D5
2 - HIP0061
OR EQUIVALENT
V
PWR
14V
(V
BATT
)

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