ZL50233GD ETC, ZL50233GD Datasheet - Page 23

• Manufacturer Part Number: ZL50233GD
• Description: 4 Channel Voice Echo Cancellor
• Manufacturer: ETC

Data Sheet
SupDec
NLRun2
NLRun2
NLRun1
Reserve
PathDet
RingClr
PathClr
NLPSel
InjCtrl
Slow
Bit 7
Bit 7
0
0
0
Power-up
Power-up
54
FB
hex
hex
Must be set to zero.
These three bits (SD2,SD1,SD0) control how long the echo canceller remains in a fast
convergence state following a path change, Reset or Bypass operation. A value of zero will keep
the echo canceller in fast convergence indefinitely.
Must be set to zero.
Slow convergence mode speed adjustment.(Bits Slow2, Slow1,Slow0)
For Slow = 1, 2, ..., 7, slow convergence speed is reduced by a factor of 2
normal adaptation.
Flow Slow = 0, no adaptation occurs during slow convergence.
When high, the comfort noise level estimator actively rejects double-talk as being background
noise. When low, the noise level estimator makes no such distinction.
Selects which noise ramping scheme is used. See Table below.
When high, the comfort noise level estimator actively rejects uncancelled echo as being
background noise. When low, the noise level estimator makes no such distinction.
When high, the instability detector is activated. When low, the instability detector is disabled.
Reserved bit. Must always be set to one for normal operation.
When high, the current echo channel estimate will be cleared and the echo canceller will enter fast
convergence mode upon detection of a path change. When low, the echo canceller will keep the
current path estimate but revert to fast convergence mode upon detection of a path change. Note:
this bit is ignored if PathDet is low.
When high, the path change detector is activated. When low, the path change detector is disabled.
When high, the Advanced NLP is selected. When low, the original NLP is selected. See Table 1 on
page 9.
Bit 6
SD2
InjCtrl
Bit 6
NLRun1
Bit 5
SD1
Bit 5
Functional Description of Register Bits
Functional Description of Register Bits
ECA: Control Register 4
ECB: Control Register 4
ECA: Control Register 3
ECB: Control Register 3
RingClr
Zarlink Semiconductor Inc.
Bit 4
SD0
Bit 4
Reserve
Bit 3
Bit 3
0
PathClr
Slow2
Bit 2
Bit 2
08
28
09
29
Slow
PathDet
Slow1
Bit 1
Bit 1
hex
hex
hex
hex
R/W Address:
R/W Address:
R/W Address:
R/W Address:
as compared to
+ Base Address
+ Base Address
+ Base Address
+ Base Address
ZL50233
NLPSel
Slow0
Bit 0
Bit 0
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