SP706P Sipex, SP706P Datasheet - Page 11

• Manufacturer Part Number: SP706P
• Description: +3.0V/+3.3V Low Power Microprocessor Supervisory Circuits
• Manufacturer: Sipex

Figure 14. Watchdog Timing Waveforms
To build an early-warning circuit for power
failure, connect the PFI pin to a voltage divider
as shown in Figure 16. Choose the voltage
divider ratio so that the voltage at PFI falls
below 1.25V just before the +5V regulator drops
out. Use PFO to interrupt the P so it can prepare
for an orderly power-down.
Figure 15. Timing Diagrams with WDI Tri-stated. The RESET Output is the Inverse of the RESET Waveform
Shown.
Rev. 10-17-00
RESET
RESET*
RESET*
WDO
WDO
WDI
MR*
V
CC
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
t
WP
0V
0V
0V
0V
0V
0V
0V
0V
SP706 +3.0/ +3.3 Low Power Microprocessor Circuits
* externally triggered LOW by MR,
*externally driven LOW
RESET is for the SP813L/813M only
V
RT
t
WD
11
Manual Reset
The manual-reset input (MR) allows RESET to
be triggered by a pushbutton switch. The switch
is effectively debounced by the 140ms
minimum RESET pulse width. MR is TTL/
CMOS logic compatible, so it can be driven by
an external logic line. MR can be used to force
a watchdog timeout to generate a RESET pulse
in the SP706P/R/S/T-SP708R/S/T series.
Simply connect WDO to MR.
t
V
RS
RT
t
WD
t
RS
t
RS
t
MD
t
MR
t
WD
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