X5328 Intersil Corporation, X5328 Datasheet
X5328
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X5328 Summary of contents
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... CC falls below a mini- CC trip point. RESET/RESET remains asserted returns to proper operating level and stabi- thresholds are TRIP RESET/RESET X5328 = RESET X5329 = RESET | Intersil (and design registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved ...
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... PART NUMBER RESET PART (ACTIVE LOW) MARKING X5328P-4.5A X5329P-4.5A X5328PZ-4.5A (Note) X5328P Z AL X5329PZ-4.5A (Note) X5329P Z AL X5328PI-4.5A X5329PI-4.5A X5328PIZ-4.5A (Note) X5328P Z AM X5329PIZ-4.5A (Note) X5329P Z AM X5328S8-4.5A X5328 AL X5329S8-4.5A X5328S8Z-4.5A (Note) X5328 Z AL X5329S8Z-4.5A (Note) X5329 Z AL X5328S8I-4.5A X5328 AM X5329S8I-4.5A X5328S8IZ-4.5A X5328 Z AM X5329S8IZ-4 ...
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... X5329PI-2.7 X5328PIZ-2.7 (Note) X5328P Z G X5329PIZ-2.7 (Note) X5328S8-2.7* X5328 F X5329S8-2.7* X5328S8Z-2.7* (Note) X5328 Z F X5329S8Z-2.7* (Note) X5329 Z F X5328S8I-2.7* X5328 G X5329S8I-2.7* X5328S8IZ-2.7* (Note) X5328 Z G X5329S8IZ-2.7* (Note) X5329 Z G X5328V14-2.7* X5329V14-2.7* X5328V14Z-2.7* X5328V Z F X5329V14Z-2.7* (Note) (Note) X5328V14I-2.7* X5329V14I-2.7* X5328V14IZ-2.7* X5328V Z G X5329V14IZ-2 ...
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... X5328, X5329 Chip Select Input. CS HIGH, deselects the device and the SO output pin high impedance state. Unless a nonvolatile write cycle is underway, the device will be in the standby power mode. CS LOW enables the device, placing it in the active power mode. Prior to the start of any operation after power-up, a HIGH to LOW transition required ...
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... PRINCIPLES OF OPERATION Power-On Reset Application of power to the X5328/X5329 activates a Power-on Reset Circuit. This circuit goes active at about 1V and pulls the RESET/RESET pin active. This signal prevents the system microprocessor from start- ing to operate with insufficient voltage or prior to stabi- lization of the oscillator. When V ...
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... Programming Sequence Flow Chart TRIP New V Applied = CC Old V Applied + Error CC Error ≥ Emax Emax = Maximum Desired Error Figure 4. Sample V Reset Circuit TRIP 4.7K V TRIP Adj. Program 6 X5328, X5329 V Programming TRIP Execute Reset V TRIP Sequence Set Applied = CC CC Desired V TRIP Execute Set V TRIP Sequence ...
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... X 7 X5328, X5329 Write Enable Latch The device contains a Write Enable Latch. This latch must be SET before a Write Operation is initiated. The WREN instruction will set the latch and the WRDI instruction will reset the latch (Figure 3). This latch is automatically reset upon a power-up condition and after the completion of a valid Write Cycle. ™ ...
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... SCK Instruction SI High Impedance SO 8 X5328, X5329 function (Table 2 LOW and WPEN bit pro- grammed HIGH disables all Status Register Write Operations. In Circuit Programmable ROM Mode This mechanism protects the block lock and Watchdog bits from inadvertent corruption. In the locked state ( pin is LOW and the nonvolatile bit WPEN is “ ...
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... X5328, X5329 For the Page Write Operation (byte or page write completed, CS can only be brought HIGH after bit 0 of the last data byte to be written is clocked in brought HIGH at any other time, the write operation will not be completed (Figure 4) ...
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... Figure 7. Write Enable Latch Sequence CS SCK SI SO Figure 8. Write Sequence SCK Instruction SCK Data Byte X5328, X5329 Instruction MSB High Impedance 4 ...
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... LOW to HIGH to HIGH May change Will change from HIGH from HIGH to LOW to LOW Don’t Care: Changing: Changes State Not Allowed Known N/A Center Line is High Impedance 11 X5328, X5329 Instruction Data Byte FN8132 ...
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... IL IH (2) This parameter is periodically sampled and not 100% tested. 12 X5328, X5329 COMMENT Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; functional operation of the ...
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... Data Hold Time H (3) t Input Rise Time RI (3) t Input Fall Time Deselect Time CS (4) t Write Cycle Time WC 13 X5328, X5329 A.C. TEST CONDITIONS CC Input pulse levels 5V Input rise and fall times Input and output timing level 4.6kΩ 30pF Parameter 10ns V x0 ...
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... CS after a valid write sequence has been sent to the end of the self-timed internal nonvolatile WC write cycle. Serial Output Timing CS SCK MSB Out ADDR SI LSB IN 14 X5328, X5329 Parameter t t CYC MSB–1 Out t ...
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... RESET Output Timing Symbol V Reset Trip Point Voltage, X5328-4.5A, X5328-4.5A TRIP Reset Trip Point Voltage, X5328, X5329 Reset Trip Point Voltage, X5328-2.7A, X5329-2.7A Reset Trip Point Voltage, X5328-2.7, X5329-2 Hysteresis (HIGH to LOW vs. LOW to HIGH V TH TRIP t Power-up Reset Time Out ...
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... V Set Conditions TRIP TRIP SCK Reset Conditions TRIP SCK > Programmed V CC TRIP 16 X5328, X5329 t THD t TSU VPH VPS VPO VPH VPS t VPO VP1 VPS VPS ...
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... Program Voltage repeatability (Successive program operations.) (programmed at tr TRIP 25° Program variation after programming (0-75°C). (programmed at 25°C) tv TRIP V programming parameters are periodically sampled and are not 100% tested. TRIP 17 X5328, X5329 = 1.7-5.5V; Temperature = 0°C to 70°C CC Description applied-V ) (Programmed at 25°C.) CC TRIP applied-V CC Min. Max. 1 ...
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... Temp°C V vs. Temperature (programmed at 25°C) TRIP 5.025 5.000 4.975 3.525 3.500 3.475 2.525 2.500 2.475 0 25 Temperature 18 X5328, X5329 t ) PURST SB 205 200 195 190 185 180 = 3V, 5V) CC 175 170 165 160 90C TRIP V = 3.5V TRIP ...
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... PACKAGING INFORMATION Half Shoulder Width On All End Pins Optional .073 (1.84) Typ. 0.010 (0.25) NOTE: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH 19 X5328, X5329 8-Lead Plastic Dual In-Line Package Type P 0.430 (10.92) 0.360 (9.14) Pin 1 Index Pin 1 0.300 (7.62) Ref. Seating Plane 0.150 (3.81) ...
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... PACKAGING INFORMATION 8-Lead Plastic Small Outline Gull Wing Package Type S Pin 1 Index 0.010 (0.25) 0.020 (0.50) 0° - 8° 0.016 (0.410) 0.037 (0.937) NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 20 X5328, X5329 Pin 1 0.014 (0.35) 0.019 (0.49) 0.188 (4.78) 0.197 (5.00) (4X) 7° 0.050 (1.27) X 45° 0.0075 (0.19) 0.250" 0.010 (0.25) FOOTPRINT 0 ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 21 X5328, X5329 0.150 (3.80) 0.158 (4.00) 0.336 (8.55) ...